Merge branch 'u300' into devel

diff --combined arch/arm/mach-u300/core.c
index 2e9b8cc,bad1ba2..be60d6d
--- 1/arch/arm/mach-u300/core.c
--- 2/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@@ -32,6 -32,8 +32,8 @@@
  
  #include "clock.h"
  #include "mmc.h"
+ #include "spi.h"
+ #include "i2c.h"
  
  /*
   * Static I/O mappings that are needed for booting the U300 platforms. The
@@@ -378,14 -380,14 +380,14 @@@ static struct platform_device wdog_devi
  };
  
  static struct platform_device i2c0_device = {
-       .name = "stddci2c",
+       .name = "stu300",
        .id = 0,
        .num_resources = ARRAY_SIZE(i2c0_resources),
        .resource = i2c0_resources,
  };
  
  static struct platform_device i2c1_device = {
-       .name = "stddci2c",
+       .name = "stu300",
        .id = 1,
        .num_resources = ARRAY_SIZE(i2c1_resources),
        .resource = i2c1_resources,
@@@ -455,8 -457,8 +457,8 @@@ void __init u300_init_irq(void
        for (i = 0; i < NR_IRQS; i++)
                set_bit(i, (unsigned long *) &mask[0]);
        u300_enable_intcon_clock();
 -      vic_init((void __iomem *) U300_INTCON0_VBASE, 0, mask[0], 0);
 -      vic_init((void __iomem *) U300_INTCON1_VBASE, 32, mask[1], 0);
 +      vic_init((void __iomem *) U300_INTCON0_VBASE, 0, mask[0], mask[0]);
 +      vic_init((void __iomem *) U300_INTCON1_VBASE, 32, mask[1], mask[1]);
  }
  
  
@@@ -510,7 -512,7 +512,7 @@@ static struct db_chip db_chips[] __init
        }
  };
  
 -static void u300_init_check_chip(void)
 +static void __init u300_init_check_chip(void)
  {
  
        u16 val;
@@@ -611,6 -613,8 +613,8 @@@ void __init u300_init_devices(void
        /* Wait for the PLL208 to lock if not locked in yet */
        while (!(readw(U300_SYSCON_VBASE + U300_SYSCON_CSR) &
                 U300_SYSCON_CSR_PLL208_LOCK_IND));
+       /* Initialize SPI device with some board specifics */
+       u300_spi_init(&pl022_device);
  
        /* Register the AMBA devices in the AMBA bus abstraction layer */
        u300_clock_primecells();
@@@ -622,6 -626,12 +626,12 @@@
  
        u300_assign_physmem();
  
+       /* Register subdevices on the I2C buses */
+       u300_i2c_register_board_devices();
+ 
+       /* Register subdevices on the SPI bus */
+       u300_spi_register_board_devices();
+ 
        /* Register the platform devices */
        platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));
  

diff --combined arch/arm/mach-u300/mmc.c
index 089b995,e66284d..82af247
--- 1/arch/arm/mach-u300/mmc.c
--- 2/arch/arm/mach-u300/mmc.c
+++ b/arch/arm/mach-u300/mmc.c
@@@ -22,6 -22,7 +22,7 @@@
  
  #include <asm/mach/mmc.h>
  #include "mmc.h"
+ #include "padmux.h"
  
  struct mmci_card_event {
        struct input_dev *mmc_input;
@@@ -146,6 -147,7 +147,7 @@@ int __devinit mmc_init(struct amba_devi
  {
        struct mmci_card_event *mmci_card;
        struct device *mmcsd_device = &adev->dev;
+       struct pmx *pmx;
        int ret = 0;
  
        mmci_card = kzalloc(sizeof(struct mmci_card_event), GFP_KERNEL);
@@@ -156,10 -158,6 +158,10 @@@
        mmci_card->mmc0_plat_data.ocr_mask = MMC_VDD_28_29;
        mmci_card->mmc0_plat_data.translate_vdd = mmc_translate_vdd;
        mmci_card->mmc0_plat_data.status = mmc_status;
 +      mmci_card->mmc0_plat_data.gpio_wp = -1;
 +      mmci_card->mmc0_plat_data.gpio_cd = -1;
 +      mmci_card->mmc0_plat_data.capabilities = MMC_CAP_MMC_HIGHSPEED |
 +              MMC_CAP_SD_HIGHSPEED | MMC_CAP_4_BIT_DATA;
  
        mmcsd_device->platform_data = (void *) &mmci_card->mmc0_plat_data;
  
@@@ -209,6 -207,20 +211,20 @@@
  
        input_set_drvdata(mmci_card->mmc_input, mmci_card);
  
+       /*
+        * Setup padmuxing for MMC. Since this must always be
+        * compiled into the kernel, pmx is never released.
+        */
+       pmx = pmx_get(mmcsd_device, U300_APP_PMX_MMC_SETTING);
+ 
+       if (IS_ERR(pmx))
+               pr_warning("Could not get padmux handle\n");
+       else {
+               ret = pmx_activate(mmcsd_device, pmx);
+               if (IS_ERR_VALUE(ret))
+                       pr_warning("Could not activate padmuxing\n");
+       }
+ 
        ret = gpio_register_callback(U300_GPIO_PIN_MMC_CD, mmci_callback,
                                     mmci_card);
  

diff --combined drivers/spi/amba-pl022.c
index c0f950a,35521af..958a3ff
--- 1/drivers/spi/amba-pl022.c
--- 2/drivers/spi/amba-pl022.c
+++ b/drivers/spi/amba-pl022.c
@@@ -38,12 -38,14 +38,12 @@@
  #include <linux/interrupt.h>
  #include <linux/spi/spi.h>
  #include <linux/workqueue.h>
 -#include <linux/errno.h>
  #include <linux/delay.h>
  #include <linux/clk.h>
  #include <linux/err.h>
  #include <linux/amba/bus.h>
  #include <linux/amba/pl022.h>
  #include <linux/io.h>
 -#include <linux/delay.h>
  
  /*
   * This macro is used to define some register default values.
@@@ -532,7 -534,7 +532,7 @@@ static void restore_state(struct pl022 
        GEN_MASK_BITS(SSP_DATA_BITS_12, SSP_CR0_MASK_DSS, 0)    | \
        GEN_MASK_BITS(SSP_MICROWIRE_CHANNEL_FULL_DUPLEX, SSP_CR0_MASK_HALFDUP, 5) | \
        GEN_MASK_BITS(SSP_CLK_POL_IDLE_LOW, SSP_CR0_MASK_SPO, 6) | \
-       GEN_MASK_BITS(SSP_CLK_FALLING_EDGE, SSP_CR0_MASK_SPH, 7) | \
+       GEN_MASK_BITS(SSP_CLK_SECOND_EDGE, SSP_CR0_MASK_SPH, 7) | \
        GEN_MASK_BITS(NMDK_SSP_DEFAULT_CLKRATE, SSP_CR0_MASK_SCR, 8) | \
        GEN_MASK_BITS(SSP_BITS_8, SSP_CR0_MASK_CSS, 16) | \
        GEN_MASK_BITS(SSP_INTERFACE_MOTOROLA_SPI, SSP_CR0_MASK_FRF, 21) \
@@@ -1247,8 -1249,8 +1247,8 @@@ static int verify_controller_parameters
                return -EINVAL;
        }
        if (chip_info->iface == SSP_INTERFACE_MOTOROLA_SPI) {
-               if ((chip_info->clk_phase != SSP_CLK_RISING_EDGE)
-                   && (chip_info->clk_phase != SSP_CLK_FALLING_EDGE)) {
+               if ((chip_info->clk_phase != SSP_CLK_FIRST_EDGE)
+                   && (chip_info->clk_phase != SSP_CLK_SECOND_EDGE)) {
                        dev_err(chip_info->dev,
                                "Clock Phase is configured incorrectly\n");
                        return -EINVAL;
@@@ -1485,7 -1487,7 +1485,7 @@@ static int pl022_setup(struct spi_devic
                chip_info->data_size = SSP_DATA_BITS_12;
                chip_info->rx_lev_trig = SSP_RX_1_OR_MORE_ELEM;
                chip_info->tx_lev_trig = SSP_TX_1_OR_MORE_EMPTY_LOC;
-               chip_info->clk_phase = SSP_CLK_FALLING_EDGE;
+               chip_info->clk_phase = SSP_CLK_SECOND_EDGE;
                chip_info->clk_pol = SSP_CLK_POL_IDLE_LOW;
                chip_info->ctrl_len = SSP_BITS_8;
                chip_info->wait_state = SSP_MWIRE_WAIT_ZERO;