[MIPS] Support SNI RM200C SNI in big endian mode and R5000 processors.

Added support for RM200C machines with big endian firmware
Added support for RM200-C40 (R5000 support)

Signed-off-by: Florian Lohoff <flo@rfc822.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 138aac4..ecf922e 100644 (file)
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -693,8 +693,8 @@ config SIBYTE_CRHONE
 
 config SNI_RM200_PCI
        bool "SNI RM200 PCI"
-       select ARC
-       select ARC32
+       select ARC if CPU_LITTLE_ENDIAN
+       select ARC32 if CPU_LITTLE_ENDIAN
        select ARCH_MAY_HAVE_PC_FDC
        select BOOT_ELF32
        select DMA_NONCOHERENT
@@ -705,10 +705,13 @@ config SNI_RM200_PCI
        select I8253
        select I8259
        select ISA
+       select SWAP_IO_SPACE if CPU_BIG_ENDIAN
        select SYS_HAS_CPU_R4X00
+       select SYS_HAS_CPU_R5000
+       select R5000_CPU_SCACHE
        select SYS_SUPPORTS_32BIT_KERNEL
        select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
-       select SYS_SUPPORTS_BIG_ENDIAN if EXPERIMENTAL
+       select SYS_SUPPORTS_BIG_ENDIAN
        select SYS_SUPPORTS_HIGHMEM
        select SYS_SUPPORTS_LITTLE_ENDIAN
        help

diff --git a/arch/mips/pci/ops-sni.c b/arch/mips/pci/ops-sni.c
index 62bdd19..2b0ccd6 100644 (file)
--- a/arch/mips/pci/ops-sni.c
+++ b/arch/mips/pci/ops-sni.c
@@ -47,13 +47,13 @@ static int pcimt_read(struct pci_bus *bus, unsigned int devfn, int reg,
 
        switch (size) {
        case 1:
-               *val = *(volatile  u8 *) (PCIMT_CONFIG_DATA + (reg & 3));
+               *val = inb(PCIMT_CONFIG_DATA + (reg & 3));
                break;
        case 2:
-               *val = *(volatile u16 *) (PCIMT_CONFIG_DATA + (reg & 2));
+               *val = inw(PCIMT_CONFIG_DATA + (reg & 2));
                break;
        case 4:
-               *val = *(volatile u32 *) PCIMT_CONFIG_DATA;
+               *val = inl(PCIMT_CONFIG_DATA);
                break;
        }
 
@@ -70,13 +70,13 @@ static int pcimt_write(struct pci_bus *bus, unsigned int devfn, int reg,
 
        switch (size) {
        case 1:
-               *(volatile  u8 *) (PCIMT_CONFIG_DATA + (reg & 3)) = val;
+               outb (val, PCIMT_CONFIG_DATA + (reg & 3));
                break;
        case 2:
-               *(volatile u16 *) (PCIMT_CONFIG_DATA + (reg & 2)) = val;
+               outw (val, PCIMT_CONFIG_DATA + (reg & 2));
                break;
        case 4:
-               *(volatile u32 *) PCIMT_CONFIG_DATA = val;
+               outl (val, PCIMT_CONFIG_DATA);
                break;
        }
 

diff --git a/arch/mips/sni/Makefile b/arch/mips/sni/Makefile
index 9c7eaa5..a5eb0ad 100644 (file)
--- a/arch/mips/sni/Makefile
+++ b/arch/mips/sni/Makefile
@@ -3,5 +3,6 @@
 #
 
 obj-y          += irq.o pcimt_scache.o reset.o setup.o
+obj-$(CONFIG_CPU_BIG_ENDIAN) += sniprom.o
 
 EXTRA_AFLAGS := $(CFLAGS)

diff --git a/arch/mips/sni/setup.c b/arch/mips/sni/setup.c
index 635b904..a050bb6 100644 (file)
--- a/arch/mips/sni/setup.c
+++ b/arch/mips/sni/setup.c
@@ -21,8 +21,11 @@
 #include <linux/fb.h>
 #include <linux/tty.h>
 
+#ifdef CONFIG_ARC
 #include <asm/arc/types.h>
 #include <asm/sgialib.h>
+#endif
+
 #include <asm/bcache.h>
 #include <asm/bootinfo.h>
 #include <asm/io.h>
@@ -72,8 +75,7 @@ static inline void sni_pcimt_detect(void)
 
 static void __init sni_display_setup(void)
 {
-#ifdef CONFIG_VT
-#if defined(CONFIG_VGA_CONSOLE)
+#if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE) && defined(CONFIG_ARC)
        struct screen_info *si = &screen_info;
        DISPLAY_STATUS *di;
 
@@ -88,7 +90,6 @@ static void __init sni_display_setup(void)
                si->orig_video_points   = 16;
        }
 #endif
-#endif
 }
 
 static struct resource sni_io_resource = {

diff --git a/arch/mips/sni/sniprom.c b/arch/mips/sni/sniprom.c
new file mode 100644 (file)
index 0000000..d1d0f1f
--- /dev/null
+++ b/arch/mips/sni/sniprom.c
@@ -0,0 +1,158 @@
+/*
+ * Big Endian PROM code for SNI RM machines
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2005-2006 Florian Lohoff (flo@rfc822.org)
+ * Copyright (C) 2005-2006 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/string.h>
+
+#include <asm/addrspace.h>
+#include <asm/sni.h>
+#include <asm/mipsprom.h>
+#include <asm/bootinfo.h>
+
+/* special SNI prom calls */
+/*
+ * This does not exist in all proms - SINIX compares
+ * the prom env variable "version" against "2.0008"
+ * or greater. If lesser it tries to probe interesting
+ * registers
+ */
+#define PROM_GET_MEMCONF       58
+
+#define PROM_VEC               (u64 *)CKSEG1ADDR(0x1fc00000)
+#define PROM_ENTRY(x)          (PROM_VEC + (x))
+
+
+#undef DEBUG
+#ifdef DEBUG
+#define DBG_PRINTF(x...)     prom_printf(x)
+#else
+#define DBG_PRINTF(x...)
+#endif
+
+static int *(*__prom_putchar)(int)        = (int *(*)(int))PROM_ENTRY(PROM_PUTCHAR);
+static char *(*__prom_getenv)(char *)     = (char *(*)(char *))PROM_ENTRY(PROM_GETENV);
+static void (*__prom_get_memconf)(void *) = (void (*)(void *))PROM_ENTRY(PROM_GET_MEMCONF);
+
+char *prom_getenv (char *s)
+{
+       return __prom_getenv(s);
+}
+
+void prom_printf(char *fmt, ...)
+{
+       va_list args;
+       char ppbuf[1024];
+       char *bptr;
+
+       va_start(args, fmt);
+       vsprintf(ppbuf, fmt, args);
+
+       bptr = ppbuf;
+
+       while (*bptr != 0) {
+               if (*bptr == '\n')
+                       __prom_putchar('\r');
+
+               __prom_putchar(*bptr++);
+       }
+       va_end(args);
+}
+
+unsigned long prom_free_prom_memory(void)
+{
+       return 0;
+}
+
+/*
+ * /proc/cpuinfo system type
+ *
+ */
+static const char *systype = "Unknown";
+const char *get_system_type(void)
+{
+       return systype;
+}
+
+#define SNI_IDPROM_BASE                0xbff00000
+#define SNI_IDPROM_MEMSIZE             (SNI_IDPROM_BASE+0x28)  /* Memsize in 16MB quantities */
+#define SNI_IDPROM_BRDTYPE             (SNI_IDPROM_BASE+0x29)  /* Board Type */
+#define SNI_IDPROM_CPUTYPE             (SNI_IDPROM_BASE+0x30)  /* CPU Type */
+
+#define SNI_IDPROM_SIZE        0x1000
+
+#ifdef DEBUG
+static void sni_idprom_dump(void)
+{
+       int     i;
+
+       prom_printf("SNI IDProm dump (first 128byte):\n");
+       for(i=0;i<128;i++) {
+               if (i%16 == 0)
+                       prom_printf("%04x ", i);
+
+               prom_printf("%02x ", *(unsigned char *) (SNI_IDPROM_BASE+i));
+
+               if (i%16 == 15)
+                       prom_printf("\n");
+       }
+}
+#endif
+
+static void sni_mem_init(void )
+{
+       int i, memsize;
+       struct membank {
+               u32             size;
+               u32             base;
+               u32             size2;
+               u32             pad1;
+               u32             pad2;
+       } memconf[8];
+
+       /* MemSIZE from prom in 16MByte chunks */
+       memsize=*((unsigned char *) SNI_IDPROM_MEMSIZE) * 16;
+
+       DBG_PRINTF("IDProm memsize: %lu MByte\n", memsize);
+
+       /* get memory bank layout from prom */
+       __prom_get_memconf(&memconf);
+
+       DBG_PRINTF("prom_get_mem_conf memory configuration:\n");
+       for(i=0;i<8 && memconf[i].size;i++) {
+               prom_printf("Bank%d: %08x @ %08x\n", i,
+                       memconf[i].size, memconf[i].base);
+               add_memory_region(memconf[i].base, memconf[i].size, BOOT_MEM_RAM);
+       }
+}
+
+void __init prom_init(void)
+{
+       int argc = fw_arg0;
+       char **argv = (void *)fw_arg1;
+       unsigned int sni_brd_type = *(unsigned char *) SNI_IDPROM_BRDTYPE;
+       int i;
+
+       DBG_PRINTF("Found SNI brdtype %02x\n", sni_brd_type);
+
+#ifdef DEBUG
+       sni_idprom_dump();
+#endif
+       sni_mem_init();
+
+       /* copy prom cmdline parameters to kernel cmdline */
+       for (i = 1; i < argc; i++) {
+               strcat(arcs_cmdline, argv[i]);
+               if (i < (argc - 1))
+                       strcat(arcs_cmdline, " ");
+       }
+}
+

diff --git a/include/asm-mips/mach-rm200/cpu-feature-overrides.h b/include/asm-mips/mach-rm200/cpu-feature-overrides.h
index 91e7cf5..0158783 100644 (file)
--- a/include/asm-mips/mach-rm200/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-rm200/cpu-feature-overrides.h
@@ -35,10 +35,8 @@
 #define cpu_has_nofpuex                0
 #define cpu_has_64bits         1
 
-#define cpu_has_subset_pcaches 0       /* No S-cache on R5000 I think ...  */
 #define cpu_dcache_line_size() 32
 #define cpu_icache_line_size() 32
-#define cpu_scache_line_size() 0       /* No S-cache on R5000 I think ...  */
 
 #define cpu_has_mips32r1       0
 #define cpu_has_mips32r2       0

diff --git a/include/asm-mips/sni.h b/include/asm-mips/sni.h
index b3bc698..b9ba54d 100644 (file)
--- a/include/asm-mips/sni.h
+++ b/include/asm-mips/sni.h
@@ -15,9 +15,6 @@
 /*
  * ASIC PCI registers for little endian configuration.
  */
-#ifndef __MIPSEL__
-#error "Fix me for big endian"
-#endif
 #define PCIMT_UCONF            0xbfff0000
 #define PCIMT_IOADTIMEOUT2     0xbfff0008
 #define PCIMT_IOMEMCONF                0xbfff0010
@@ -51,9 +48,9 @@
 #define PCIMT_PCI_CONF         0xbfff0100
 
 /*
- * Data port for the PCI bus.
+ * Data port for the PCI bus in IO space
  */
-#define PCIMT_CONFIG_DATA      0xb4000cfc
+#define PCIMT_CONFIG_DATA      0x0cfc
 
 /*
  * Board specific registers