drm/radeon: add new getparam for number of backends.
authorDave Airlie <airlied@redhat.com>
Tue, 1 Mar 2011 04:32:27 +0000 (14:32 +1000)
committerDave Airlie <airlied@redhat.com>
Tue, 1 Mar 2011 05:01:20 +0000 (15:01 +1000)
This allows userspace to work out how many DBs there are
for conditional rendering to work.

Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/gpu/drm/radeon/radeon_drv.c
drivers/gpu/drm/radeon/radeon_kms.c
include/drm/radeon_drm.h

index 6c11615..63d2de8 100644 (file)
@@ -49,7 +49,7 @@
  * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
  *   2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
  *   2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
- *   2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg
+ *   2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
  */
 #define KMS_DRIVER_MAJOR       2
 #define KMS_DRIVER_MINOR       9
index 4057ebf..68a7b22 100644 (file)
@@ -205,6 +205,17 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
                /* return clock value in KHz */
                value = rdev->clock.spll.reference_freq * 10;
                break;
+       case RADEON_INFO_NUM_BACKENDS:
+               if (rdev->family >= CHIP_CEDAR)
+                       value = rdev->config.evergreen.max_backends;
+               else if (rdev->family >= CHIP_RV770)
+                       value = rdev->config.rv770.max_backends;
+               else if (rdev->family >= CHIP_R600)
+                       value = rdev->config.r600.max_backends;
+               else {
+                       return -EINVAL;
+               }
+               break;
        default:
                DRM_DEBUG_KMS("Invalid request %d\n", info->request);
                return -EINVAL;
index e5c607a..3dec41c 100644 (file)
@@ -908,6 +908,7 @@ struct drm_radeon_cs {
 #define RADEON_INFO_WANT_HYPERZ                0x07
 #define RADEON_INFO_WANT_CMASK         0x08 /* get access to CMASK on r300 */
 #define RADEON_INFO_CLOCK_CRYSTAL_FREQ 0x09 /* clock crystal frequency */
+#define RADEON_INFO_NUM_BACKENDS       0x0a /* DB/backends for r600+ - need for OQ */
 
 struct drm_radeon_info {
        uint32_t                request;