ath9k_hw: Find the maximum number of chains that hw supports
authorVasanthakumar Thiagarajan <vasanth@atheros.com>
Mon, 6 Dec 2010 12:27:43 +0000 (04:27 -0800)
committerJohn W. Linville <linville@tuxdriver.com>
Tue, 7 Dec 2010 21:34:54 +0000 (16:34 -0500)
Have it in ah->caps. This will be used during various
calibrations.

Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/ath/ath9k/hw.c
drivers/net/wireless/ath/ath9k/hw.h

index 49da184..a2f85b7 100644 (file)
@@ -1764,7 +1764,7 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
        struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
 
        u16 capField = 0, eeval;
-       u8 ant_div_ctl1;
+       u8 ant_div_ctl1, tx_chainmask, rx_chainmask;
 
        eeval = ah->eep_ops->get_eeprom(ah, EEP_REG_0);
        regulatory->current_rd = eeval;
@@ -1976,6 +1976,18 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
                pCap->pcie_lcr_offset = 0x80;
        }
 
+       tx_chainmask = pCap->tx_chainmask;
+       rx_chainmask = pCap->rx_chainmask;
+       while (tx_chainmask || rx_chainmask) {
+               if (tx_chainmask & BIT(0))
+                       pCap->max_txchains++;
+               if (rx_chainmask & BIT(0))
+                       pCap->max_rxchains++;
+
+               tx_chainmask >>= 1;
+               rx_chainmask >>= 1;
+       }
+
        return 0;
 }
 
index 76ae329..fcfd63e 100644 (file)
@@ -199,6 +199,8 @@ struct ath9k_hw_capabilities {
        u16 rts_aggr_limit;
        u8 tx_chainmask;
        u8 rx_chainmask;
+       u8 max_txchains;
+       u8 max_rxchains;
        u16 tx_triglevel_max;
        u16 reg_cap;
        u8 num_gpio_pins;