Merge tag 'at91-dt-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/mripard...

Pull AT91 ramc and reset/poweroff related DT patches from Maxim Ripard:
 "This branch gathers a few devicetree patches needed for the reworks found in
  the later patches to be sent. More precisely, it holds:
    - The addition of ddrck for the sama5d3 and the sam9 SoCs
    - The addition of the shutdown controller node in the sama5d3 DTSI
    - The slight rework of the ramc bindings for the SoCs that have several RAM
      controllers"

Conflicts:
	arch/arm/boot/dts/at91sam9g45.dtsi

diff --cc arch/arm/boot/dts/at91sam9263.dtsi
index bb23c2d,e8ecb03..840958b
--- 1/arch/arm/boot/dts/at91sam9263.dtsi
--- 2/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@@ -85,270 -69,16 +85,274 @@@
                        pmc: pmc@fffffc00 {
                                compatible = "atmel,at91rm9200-pmc";
                                reg = <0xfffffc00 0x100>;
 +                              interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 +                              interrupt-controller;
 +                              #address-cells = <1>;
 +                              #size-cells = <0>;
 +                              #interrupt-cells = <1>;
 +
 +                              main_osc: main_osc {
 +                                      compatible = "atmel,at91rm9200-clk-main-osc";
 +                                      #clock-cells = <0>;
 +                                      interrupts-extended = <&pmc AT91_PMC_MOSCS>;
 +                                      clocks = <&main_xtal>;
 +                              };
 +
 +                              main: mainck {
 +                                      compatible = "atmel,at91rm9200-clk-main";
 +                                      #clock-cells = <0>;
 +                                      clocks = <&main_osc>;
 +                              };
 +
 +                              plla: pllack {
 +                                      compatible = "atmel,at91rm9200-clk-pll";
 +                                      #clock-cells = <0>;
 +                                      interrupts-extended = <&pmc AT91_PMC_LOCKA>;
 +                                      clocks = <&main>;
 +                                      reg = <0>;
 +                                      atmel,clk-input-range = <1000000 32000000>;
 +                                      #atmel,pll-clk-output-range-cells = <4>;
 +                                      atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
 +                                                              <190000000 240000000 2 1>;
 +                              };
 +
 +                              pllb: pllbck {
 +                                      compatible = "atmel,at91rm9200-clk-pll";
 +                                      #clock-cells = <0>;
 +                                      interrupts-extended = <&pmc AT91_PMC_LOCKB>;
 +                                      clocks = <&main>;
 +                                      reg = <1>;
 +                                      atmel,clk-input-range = <1000000 5000000>;
 +                                      #atmel,pll-clk-output-range-cells = <4>;
 +                                      atmel,pll-clk-output-ranges = <70000000 130000000 1 1>;
 +                              };
 +
 +                              mck: masterck {
 +                                      compatible = "atmel,at91rm9200-clk-master";
 +                                      #clock-cells = <0>;
 +                                      interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
 +                                      clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
 +                                      atmel,clk-output-range = <0 120000000>;
 +                                      atmel,clk-divisors = <1 2 4 0>;
 +                              };
 +
 +                              usb: usbck {
 +                                      compatible = "atmel,at91rm9200-clk-usb";
 +                                      #clock-cells = <0>;
 +                                      atmel,clk-divisors = <1 2 4 0>;
 +                                      clocks = <&pllb>;
 +                              };
 +
 +                              prog: progck {
 +                                      compatible = "atmel,at91rm9200-clk-programmable";
 +                                      #address-cells = <1>;
 +                                      #size-cells = <0>;
 +                                      interrupt-parent = <&pmc>;
 +                                      clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
 +
 +                                      prog0: prog0 {
 +                                              #clock-cells = <0>;
 +                                              reg = <0>;
 +                                              interrupts = <AT91_PMC_PCKRDY(0)>;
 +                                      };
 +
 +                                      prog1: prog1 {
 +                                              #clock-cells = <0>;
 +                                              reg = <1>;
 +                                              interrupts = <AT91_PMC_PCKRDY(1)>;
 +                                      };
 +
 +                                      prog2: prog2 {
 +                                              #clock-cells = <0>;
 +                                              reg = <2>;
 +                                              interrupts = <AT91_PMC_PCKRDY(2)>;
 +                                      };
 +
 +                                      prog3: prog3 {
 +                                              #clock-cells = <0>;
 +                                              reg = <3>;
 +                                              interrupts = <AT91_PMC_PCKRDY(3)>;
 +                                      };
 +                              };
 +
 +                              systemck {
 +                                      compatible = "atmel,at91rm9200-clk-system";
 +                                      #address-cells = <1>;
 +                                      #size-cells = <0>;
 +
 +                                      uhpck: uhpck {
 +                                              #clock-cells = <0>;
 +                                              reg = <6>;
 +                                              clocks = <&usb>;
 +                                      };
 +
 +                                      udpck: udpck {
 +                                              #clock-cells = <0>;
 +                                              reg = <7>;
 +                                              clocks = <&usb>;
 +                                      };
 +
 +                                      pck0: pck0 {
 +                                              #clock-cells = <0>;
 +                                              reg = <8>;
 +                                              clocks = <&prog0>;
 +                                      };
 +
 +                                      pck1: pck1 {
 +                                              #clock-cells = <0>;
 +                                              reg = <9>;
 +                                              clocks = <&prog1>;
 +                                      };
 +
 +                                      pck2: pck2 {
 +                                              #clock-cells = <0>;
 +                                              reg = <10>;
 +                                              clocks = <&prog2>;
 +                                      };
 +
 +                                      pck3: pck3 {
 +                                              #clock-cells = <0>;
 +                                              reg = <11>;
 +                                              clocks = <&prog3>;
 +                                      };
 +                              };
 +
 +                              periphck {
 +                                      compatible = "atmel,at91rm9200-clk-peripheral";
 +                                      #address-cells = <1>;
 +                                      #size-cells = <0>;
 +                                      clocks = <&mck>;
 +
 +                                      pioA_clk: pioA_clk {
 +                                              #clock-cells = <0>;
 +                                              reg = <2>;
 +                                      };
 +
 +                                      pioB_clk: pioB_clk {
 +                                              #clock-cells = <0>;
 +                                              reg = <3>;
 +                                      };
 +
 +                                      pioCDE_clk: pioCDE_clk {
 +                                              #clock-cells = <0>;
 +                                              reg = <4>;
 +                                      };
 +
 +                                      usart0_clk: usart0_clk {
 +                                              #clock-cells = <0>;
 +                                              reg = <7>;
 +                                      };
 +
 +                                      usart1_clk: usart1_clk {
 +                                              #clock-cells = <0>;
 +                                              reg = <8>;
 +                                      };
 +
 +                                      usart2_clk: usart2_clk {
 +                                              #clock-cells = <0>;
 +                                              reg = <9>;
 +                                      };
 +
 +                                      mci0_clk: mci0_clk {
 +                                              #clock-cells = <0>;
 +                                              reg = <10>;
 +                                      };
 +
 +                                      mci1_clk: mci1_clk {
 +                                              #clock-cells = <0>;
 +                                              reg = <11>;
 +                                      };
 +
 +                                      can_clk: can_clk {
 +                                              #clock-cells = <0>;
 +                                              reg = <12>;
 +                                      };
 +
 +                                      twi0_clk: twi0_clk {
 +                                              #clock-cells = <0>;
 +                                              reg = <13>;
 +                                      };
 +
 +                                      spi0_clk: spi0_clk {
 +                                              #clock-cells = <0>;
 +                                              reg = <14>;
 +                                      };
 +
 +                                      spi1_clk: spi1_clk {
 +                                              #clock-cells = <0>;
 +                                              reg = <15>;
 +                                      };
 +
 +                                      ssc0_clk: ssc0_clk {
 +                                              #clock-cells = <0>;
 +                                              reg = <16>;
 +                                      };
 +
 +                                      ssc1_clk: ssc1_clk {
 +                                              #clock-cells = <0>;
 +                                              reg = <17>;
 +                                      };
 +
 +                                      ac91_clk: ac97_clk {
 +                                              #clock-cells = <0>;
 +                                              reg = <18>;
 +                                      };
 +
 +                                      tcb_clk: tcb_clk {
 +                                              #clock-cells = <0>;
 +                                              reg = <19>;
 +                                      };
 +
 +                                      pwm_clk: pwm_clk {
 +                                              #clock-cells = <0>;
 +                                              reg = <20>;
 +                                      };
 +
 +                                      macb0_clk: macb0_clk {
 +                                              #clock-cells = <0>;
 +                                              reg = <21>;
 +                                      };
 +
 +                                      g2de_clk: g2de_clk {
 +                                              #clock-cells = <0>;
 +                                              reg = <23>;
 +                                      };
 +
 +                                      udc_clk: udc_clk {
 +                                              #clock-cells = <0>;
 +                                              reg = <24>;
 +                                      };
 +
 +                                      isi_clk: isi_clk {
 +                                              #clock-cells = <0>;
 +                                              reg = <25>;
 +                                      };
 +
 +                                      lcd_clk: lcd_clk {
 +                                              #clock-cells = <0>;
 +                                              reg = <26>;
 +                                      };
 +
 +                                      dma_clk: dma_clk {
 +                                              #clock-cells = <0>;
 +                                              reg = <27>;
 +                                      };
 +
 +                                      ohci_clk: ohci_clk {
 +                                              #clock-cells = <0>;
 +                                              reg = <29>;
 +                                      };
 +                              };
                        };
  
-                       ramc: ramc@ffffe200 {
+                       ramc0: ramc@ffffe200 {
                                compatible = "atmel,at91sam9260-sdramc";
-                               reg = <0xffffe200 0x200
-                                      0xffffe800 0x200>;
+                               reg = <0xffffe200 0x200>;
+                       };
+ 
+                       ramc1: ramc@ffffe800 {
+                               compatible = "atmel,at91sam9260-sdramc";
+                               reg = <0xffffe800 0x200>;
                        };
  
                        pit: timer@fffffd30 {

diff --cc arch/arm/boot/dts/at91sam9g45.dtsi
index 932a669,6f648b8..857fd3e
--- 1/arch/arm/boot/dts/at91sam9g45.dtsi
--- 2/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@@ -96,10 -75,12 +96,16 @@@
  
                        ramc0: ramc@ffffe400 {
                                compatible = "atmel,at91sam9g45-ddramc";
-                               reg = <0xffffe400 0x200
-                                      0xffffe600 0x200>;
+                               reg = <0xffffe400 0x200>;
++                              clocks = <&ddrck>;
++                              clock-names = "ddrck";
+                       };
+ 
+                       ramc1: ramc@ffffe600 {
+                               compatible = "atmel,at91sam9g45-ddramc";
+                               reg = <0xffffe600 0x200>;
 +                              clocks = <&ddrck>;
 +                              clock-names = "ddrck";
                        };
  
                        pmc: pmc@fffffc00 {

diff --cc arch/arm/boot/dts/at91sam9n12.dtsi
Simple merge

diff --cc arch/arm/boot/dts/at91sam9x5.dtsi
Simple merge

diff --cc arch/arm/boot/dts/sama5d3.dtsi
Simple merge