ARM: pxa168: added wake clear register support for APMU
authorMark F. Brown <mark.brown314@gmail.com>
Fri, 3 Sep 2010 22:28:08 +0000 (18:28 -0400)
committerEric Miao <eric.y.miao@gmail.com>
Sat, 9 Oct 2010 09:07:18 +0000 (17:07 +0800)
Signed-off-by: Mark F. Brown <mark.brown314@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
arch/arm/mach-mmp/include/mach/regs-apmu.h

index 9190305..ac47023 100644 (file)
 #define APMU_FNRST_DIS (1 << 1)
 #define APMU_AXIRST_DIS        (1 << 0)
 
+/* Wake Clear Register */
+#define APMU_WAKE_CLR  APMU_REG(0x07c)
+
+#define APMU_PXA168_KP_WAKE_CLR                (1 << 7)
+#define APMU_PXA168_CFI_WAKE_CLR       (1 << 6)
+#define APMU_PXA168_XD_WAKE_CLR                (1 << 5)
+#define APMU_PXA168_MSP_WAKE_CLR       (1 << 4)
+#define APMU_PXA168_SD4_WAKE_CLR       (1 << 3)
+#define APMU_PXA168_SD3_WAKE_CLR       (1 << 2)
+#define APMU_PXA168_SD2_WAKE_CLR       (1 << 1)
+#define APMU_PXA168_SD1_WAKE_CLR       (1 << 0)
+
 #endif /* __ASM_MACH_REGS_APMU_H */