ARM: OMAP: Use __raw_read/write in irq.c

Also remove verbose debugging line for upstream merge.

Looks like with __raw_read/write the object code is sligtly
smaller (even with the debugging left out in the original code):

Old with omap_read/write:

00000000 <intc_bank_write_reg>:
   0:	e1a0c00d 	mov	ip, sp
   4:	e92dd800 	push	{fp, ip, lr, pc}
   8:	e24cb004 	sub	fp, ip, #4	; 0x4
   c:	e5913000 	ldr	r3, [r1]
  10:	e2833209 	add	r3, r3, #-1879048192	; 0x90000000
  14:	e7830002 	str	r0, [r3, r2]
  18:	e89da800 	ldm	sp, {fp, sp, pc}

0000001c <intc_bank_read_reg>:
  1c:	e1a0c00d 	mov	ip, sp
  20:	e92dd800 	push	{fp, ip, lr, pc}
  24:	e24cb004 	sub	fp, ip, #4	; 0x4
  28:	e5903000 	ldr	r3, [r0]
  2c:	e2833209 	add	r3, r3, #-1879048192	; 0x90000000
  30:	e7930001 	ldr	r0, [r3, r1]
  34:	e89da800 	ldm	sp, {fp, sp, pc}

New code with __raw_read/write:

00000000 <intc_bank_write_reg>:
   0:	e1a0c00d 	mov	ip, sp
   4:	e92dd800 	push	{fp, ip, lr, pc}
   8:	e24cb004 	sub	fp, ip, #4	; 0x4
   c:	e5913000 	ldr	r3, [r1]
  10:	e7820003 	str	r0, [r2, r3]
  14:	e89da800 	ldm	sp, {fp, sp, pc}

00000018 <intc_bank_read_reg>:
  18:	e1a0c00d 	mov	ip, sp
  1c:	e92dd800 	push	{fp, ip, lr, pc}
  20:	e24cb004 	sub	fp, ip, #4	; 0x4
  24:	e5903000 	ldr	r3, [r0]
  28:	e7910003 	ldr	r0, [r1, r3]
  2c:	e89da800 	ldm	sp, {fp, sp, pc}

Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c
index ae36437..54cc6e1 100644 (file)
--- a/arch/arm/mach-omap2/clock24xx.c
+++ b/arch/arm/mach-omap2/clock24xx.c
@@ -77,7 +77,6 @@ static u32 omap2_get_dpll_rate_24xx(struct clk *tclk)
 
 static int omap2_enable_osc_ck(struct clk *clk)
 {
-
        prm_rmw_mod_reg_bits(OMAP_AUTOEXTCLKMODE_MASK, 0,
                        OMAP24XX_GR_MOD, OMAP24XX_PRCM_CLKSRC_CTRL_OFFSET);
 

diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 94d2f93..ce85971 100644 (file)
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -52,15 +52,12 @@ static struct omap_irq_bank {
 
 static void intc_bank_write_reg(u32 val, struct omap_irq_bank *bank, u16 reg)
 {
-       pr_debug("intc_write_reg: writing 0x%0x to 0x%0x\n", val,
-                (__force u32)(bank->base_reg + reg));
-
-       omap_writel(val, bank->base_reg + reg);
+       __raw_writel(val, bank->base_reg + reg);
 }
 
 static u32 intc_bank_read_reg(struct omap_irq_bank *bank, u16 reg)
 {
-       return omap_readl(bank->base_reg + reg);
+       return __raw_readl(bank->base_reg + reg);
 }
 
 /* XXX: FIQ and additional INTC support (only MPU at the moment) */
@@ -150,9 +147,9 @@ void __init omap_init_irq(void)
                struct omap_irq_bank *bank = irq_banks + i;
 
                if (cpu_is_omap24xx())
-                       bank->base_reg = OMAP24XX_IC_BASE;
+                       bank->base_reg = io_p2v(OMAP24XX_IC_BASE);
                else if (cpu_is_omap34xx())
-                       bank->base_reg = OMAP34XX_IC_BASE;
+                       bank->base_reg = io_p2v(OMAP34XX_IC_BASE);
 
                omap_irq_bank_init_one(bank);