drm/nvc0: reserve only subc 0 for kernel use
authorBen Skeggs <bskeggs@redhat.com>
Thu, 30 Dec 2010 01:53:48 +0000 (11:53 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Thu, 30 Dec 2010 01:55:07 +0000 (11:55 +1000)
Current 3D driver expects this behaviour.  While this could be changed,
there's no compelling reason to reserve more than one subchannel for the
DRM.  If we ever need to use an object other then M2MF, we can just
re-bind subchannel 0 as required.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/nouveau_channel.c
drivers/gpu/drm/nouveau/nouveau_fence.c

index 4d2f194..a57a1d2 100644 (file)
@@ -446,14 +446,20 @@ nouveau_ioctl_fifo_alloc(struct drm_device *dev, void *data,
        else
                init->pushbuf_domains = NOUVEAU_GEM_DOMAIN_GART;
 
-       init->subchan[0].handle = NvM2MF;
-       if (dev_priv->card_type < NV_50)
-               init->subchan[0].grclass = 0x0039;
-       else
-               init->subchan[0].grclass = 0x5039;
-       init->subchan[1].handle = NvSw;
-       init->subchan[1].grclass = NV_SW;
-       init->nr_subchan = 2;
+       if (dev_priv->card_type < NV_C0) {
+               init->subchan[0].handle = NvM2MF;
+               if (dev_priv->card_type < NV_50)
+                       init->subchan[0].grclass = 0x0039;
+               else
+                       init->subchan[0].grclass = 0x5039;
+               init->subchan[1].handle = NvSw;
+               init->subchan[1].grclass = NV_SW;
+               init->nr_subchan = 2;
+       } else {
+               init->subchan[0].handle  = 0x9039;
+               init->subchan[0].grclass = 0x9039;
+               init->nr_subchan = 1;
+       }
 
        /* Named memory object area */
        ret = drm_gem_handle_create(file_priv, chan->notifier_bo->gem,
index 88b2f29..221b846 100644 (file)
@@ -165,7 +165,7 @@ nouveau_fence_emit(struct nouveau_fence *fence)
                if (dev_priv->card_type < NV_C0)
                        BEGIN_RING(chan, NvSubSw, 0x0050, 1);
                else
-                       BEGIN_NVC0(chan, 2, NvSubSw, 0x0050, 1);
+                       BEGIN_NVC0(chan, 2, NvSubM2MF, 0x0050, 1);
        } else {
                BEGIN_RING(chan, NvSubSw, 0x0150, 1);
        }