sh: intc - remove redundant irq code for shmin
authorMagnus Damm <damm@igel.co.jp>
Fri, 3 Aug 2007 05:24:29 +0000 (14:24 +0900)
committerPaul Mundt <lethal@linux-sh.org>
Fri, 21 Sep 2007 02:57:47 +0000 (11:57 +0900)
This patch removes redundant interrupt code for the shmin board which
is using a sh770x processor and 4 IRQ lines as individual interrupts
(IRQ-mode).

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
arch/sh/boards/shmin/setup.c
arch/sh/kernel/cpu/sh3/setup-sh770x.c

index dfd1245..16e5dae 100644 (file)
 
 #define PFC_PHCR       0xa400010eUL
 #define INTC_ICR1      0xa4000010UL
-#define INTC_IPRC      0xa4000016UL
-
-static struct ipr_data ipr_irq_table[] = {
-       { 32, 0, 0, 0 },
-       { 33, 0, 4, 0 },
-       { 34, 0, 8, 8 },
-       { 35, 0, 12, 0 },
-};
-
-static unsigned long ipr_offsets[] = {
-       INTC_IPRC,
-};
-
-static struct ipr_desc ipr_irq_desc = {
-       .ipr_offsets    = ipr_offsets,
-       .nr_offsets     = ARRAY_SIZE(ipr_offsets),
-
-       .ipr_data       = ipr_irq_table,
-       .nr_irqs        = ARRAY_SIZE(ipr_irq_table),
-
-       .chip = {
-               .name   = "IPR-shmin",
-       },
-};
 
 static void __init init_shmin_irq(void)
 {
        ctrl_outw(0x2a00, PFC_PHCR);    // IRQ0-3=IRQ
        ctrl_outw(0x0aaa, INTC_ICR1);   // IRQ0-3=IRQ-mode,Low-active.
-       register_ipr_controller(&ipr_irq_desc);
+       plat_irq_setup_pins(IRQ_MODE_IRQ);
 }
 
 static void __iomem *shmin_ioport_map(unsigned long port, unsigned int size)
index 97570c7..eef505b 100644 (file)
@@ -201,12 +201,16 @@ static int __init sh770x_devices_setup(void)
 }
 __initcall(sh770x_devices_setup);
 
+#define INTC_ICR1              0xa4000010UL
+#define INTC_ICR1_IRQLVL       (1<<14)
+
 void __init plat_irq_setup_pins(int mode)
 {
        if (mode == IRQ_MODE_IRQ) {
 #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
     defined(CONFIG_CPU_SUBTYPE_SH7707) || \
     defined(CONFIG_CPU_SUBTYPE_SH7709)
+               ctrl_outw(ctrl_inw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1);
                register_intc_controller(&intc_desc_irq);
                return;
 #endif