drm/i915: fix operator precedence when enabling RC6p
authorEugeni Dodonov <eugeni.dodonov@intel.com>
Fri, 24 Feb 2012 01:57:06 +0000 (23:57 -0200)
committerBen Hutchings <ben@decadent.org.uk>
Wed, 25 Jul 2012 03:10:58 +0000 (04:10 +0100)
commit c0e2ee1bc0cf82eec89e26b7afe7e4db0561b7d9 upstream.

As noticed by Torsten Kaiser, the operator precedence can play tricks with
us here.

CC: Dave Airlie <airlied@redhat.com>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
drivers/gpu/drm/i915/intel_display.c

index c63ca5f..cc75c4b 100644 (file)
@@ -8044,7 +8044,7 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv)
 
        if (intel_enable_rc6(dev_priv->dev))
                rc6_mask = GEN6_RC_CTL_RC6_ENABLE |
-                       (IS_GEN7(dev_priv->dev)) ? GEN6_RC_CTL_RC6p_ENABLE : 0;
+                       ((IS_GEN7(dev_priv->dev)) ? GEN6_RC_CTL_RC6p_ENABLE : 0);
 
        I915_WRITE(GEN6_RC_CONTROL,
                   rc6_mask |