staging/et131x: fix et131x_rx_dma_disable halt_status usage

Commit 1bd751c1abc1029e8a0ae63ef4f19357c735a2a3
("Staging: et131x: Clean up rxdma_csr") changed csr from bitfield to
u32, but failed to convert 2 uses of halt_status bit. It did:

- if (csr.bits.halt_status != 1)
+ if ((csr & 0x00020000) != 1)

which is wrong, because second version is always true.
Fix it.

This bug was found by coccinelle (http://coccinelle.lip6.fr/).

Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com>
Acked-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

diff --git a/drivers/staging/et131x/et1310_rx.c b/drivers/staging/et131x/et1310_rx.c
index a87da68..339136f 100644 (file)
--- a/drivers/staging/et131x/et1310_rx.c
+++ b/drivers/staging/et131x/et1310_rx.c
@@ -717,10 +717,10 @@ void et131x_rx_dma_disable(struct et131x_adapter *etdev)
        /* Setup the receive dma configuration register */
        writel(0x00002001, &etdev->regs->rxdma.csr);
        csr = readl(&etdev->regs->rxdma.csr);
-       if ((csr & 0x00020000) != 1) {  /* Check halt status (bit 17) */
+       if ((csr & 0x00020000) == 0) {  /* Check halt status (bit 17) */
                udelay(5);
                csr = readl(&etdev->regs->rxdma.csr);
-               if ((csr & 0x00020000) != 1)
+               if ((csr & 0x00020000) == 0)
                        dev_err(&etdev->pdev->dev,
                        "RX Dma failed to enter halt state. CSR 0x%08x\n",
                                csr);