ARM: Provide common header for hard_smp_processor_id()
authorRussell King <rmk+kernel@arm.linux.org.uk>
Sat, 4 Sep 2010 15:14:20 +0000 (16:14 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Mon, 4 Oct 2010 19:20:45 +0000 (20:20 +0100)
Provide a common header to read the SMP CPU number from the MPIDR.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/include/asm/smp_mpidr.h [new file with mode: 0644]
arch/arm/mach-realview/include/mach/smp.h
arch/arm/mach-s5pv310/include/mach/smp.h
arch/arm/mach-tegra/include/mach/smp.h
arch/arm/mach-ux500/include/mach/smp.h
arch/arm/mach-vexpress/include/mach/smp.h
arch/arm/plat-omap/include/plat/smp.h

diff --git a/arch/arm/include/asm/smp_mpidr.h b/arch/arm/include/asm/smp_mpidr.h
new file mode 100644 (file)
index 0000000..7da7105
--- /dev/null
@@ -0,0 +1,12 @@
+#ifndef ASMARM_SMP_MIDR_H
+#define ASMARM_SMP_MIDR_H
+
+#define hard_smp_processor_id()                                                \
+       ({                                                              \
+               unsigned int cpunum;                                    \
+               __asm__("mrc p15, 0, %0, c0, c0, 5\n"                   \
+                       : "=r" (cpunum));                               \
+               cpunum &= 0x0F;                                         \
+       })
+
+#endif
index dd53892..d3cd265 100644 (file)
@@ -1,16 +1,8 @@
 #ifndef ASMARM_ARCH_SMP_H
 #define ASMARM_ARCH_SMP_H
 
-
 #include <asm/hardware/gic.h>
-
-#define hard_smp_processor_id()                        \
-       ({                                              \
-               unsigned int cpunum;                    \
-               __asm__("mrc p15, 0, %0, c0, c0, 5"     \
-                       : "=r" (cpunum));               \
-               cpunum &= 0x0F;                         \
-       })
+#include <asm/smp_mpidr.h>
 
 /*
  * We use IRQ1 as the IPI
index 990f3ba..b7ec252 100644 (file)
@@ -7,17 +7,10 @@
 #define ASM_ARCH_SMP_H __FILE__
 
 #include <asm/hardware/gic.h>
+#include <asm/smp_mpidr.h>
 
 extern void __iomem *gic_cpu_base_addr;
 
-#define hard_smp_processor_id()                        \
-       ({                                              \
-               unsigned int cpunum;                    \
-               __asm__("mrc p15, 0, %0, c0, c0, 5"     \
-                       : "=r" (cpunum));               \
-               cpunum &= 0x03;                         \
-       })
-
 /*
  * We use IRQ1 as the IPI
  */
index 8b42dab..e4a34a3 100644 (file)
@@ -1,16 +1,8 @@
 #ifndef ASMARM_ARCH_SMP_H
 #define ASMARM_ARCH_SMP_H
 
-
 #include <asm/hardware/gic.h>
-
-#define hard_smp_processor_id()                        \
-       ({                                              \
-               unsigned int cpunum;                    \
-               __asm__("mrc p15, 0, %0, c0, c0, 5"     \
-                       : "=r" (cpunum));               \
-               cpunum &= 0x0F;                         \
-       })
+#include <asm/smp_mpidr.h>
 
 /*
  * We use IRQ1 as the IPI
index b59f7bc..197e841 100644 (file)
 #define ASMARM_ARCH_SMP_H
 
 #include <asm/hardware/gic.h>
+#include <asm/smp_mpidr.h>
 
 /* This is required to wakeup the secondary core */
 extern void u8500_secondary_startup(void);
 
-#define hard_smp_processor_id()                                \
-       ({                                              \
-               unsigned int cpunum;                    \
-               __asm__("mrc p15, 0, %0, c0, c0, 5"     \
-                       : "=r" (cpunum));               \
-               cpunum &= 0x0F;                         \
-       })
-
 /*
  * We use IRQ1 as the IPI
  */
index 72a9621..5a6da4f 100644 (file)
@@ -2,14 +2,7 @@
 #define __MACH_SMP_H
 
 #include <asm/hardware/gic.h>
-
-#define hard_smp_processor_id()                                \
-       ({                                              \
-               unsigned int cpunum;                    \
-               __asm__("mrc p15, 0, %0, c0, c0, 5"     \
-                       : "=r" (cpunum));               \
-               cpunum &= 0x0F;                         \
-       })
+#include <asm/smp_mpidr.h>
 
 /*
  * We use IRQ1 as the IPI
index 5177a9c..ecd6a48 100644 (file)
@@ -18,6 +18,7 @@
 #define OMAP_ARCH_SMP_H
 
 #include <asm/hardware/gic.h>
+#include <asm/smp_mpidr.h>
 
 /* Needed for secondary core boot */
 extern void omap_secondary_startup(void);
@@ -33,15 +34,4 @@ static inline void smp_cross_call(const struct cpumask *mask)
        gic_raise_softirq(mask, 1);
 }
 
-/*
- * Read MPIDR: Multiprocessor affinity register
- */
-#define hard_smp_processor_id()                        \
-       ({                                              \
-               unsigned int cpunum;                    \
-               __asm__("mrc p15, 0, %0, c0, c0, 5"     \
-                       : "=r" (cpunum));               \
-               cpunum &= 0x0F;                         \
-       })
-
 #endif