Bluetooth: Read number of supported IAC on controller setup
[pandora-kernel.git] / include / net / bluetooth / hci.h
index aaeaf09..8567f44 100644 (file)
@@ -35,6 +35,8 @@
 
 #define HCI_MAX_AMP_ASSOC_SIZE 672
 
+#define HCI_MAX_CSB_DATA_SIZE  252
+
 /* HCI dev events */
 #define HCI_DEV_REG                    1
 #define HCI_DEV_UNREG                  2
 #define HCI_AMP                0x01
 
 /* First BR/EDR Controller shall have ID = 0 */
-#define HCI_BREDR_ID   0
+#define AMP_ID_BREDR   0x00
+
+/* AMP controller types */
+#define AMP_TYPE_BREDR 0x00
+#define AMP_TYPE_80211 0x01
 
 /* AMP controller status */
-#define AMP_CTRL_POWERED_DOWN                  0x00
-#define AMP_CTRL_BLUETOOTH_ONLY                        0x01
-#define AMP_CTRL_NO_CAPACITY                   0x02
-#define AMP_CTRL_LOW_CAPACITY                  0x03
-#define AMP_CTRL_MEDIUM_CAPACITY               0x04
-#define AMP_CTRL_HIGH_CAPACITY                 0x05
-#define AMP_CTRL_FULL_CAPACITY                 0x06
+#define AMP_STATUS_POWERED_DOWN                        0x00
+#define AMP_STATUS_BLUETOOTH_ONLY              0x01
+#define AMP_STATUS_NO_CAPACITY                 0x02
+#define AMP_STATUS_LOW_CAPACITY                        0x03
+#define AMP_STATUS_MEDIUM_CAPACITY             0x04
+#define AMP_STATUS_HIGH_CAPACITY               0x05
+#define AMP_STATUS_FULL_CAPACITY               0x06
 
 /* HCI device quirks */
 enum {
@@ -104,22 +110,25 @@ enum {
 enum {
        HCI_SETUP,
        HCI_AUTO_OFF,
+       HCI_RFKILLED,
        HCI_MGMT,
        HCI_PAIRABLE,
        HCI_SERVICE_CACHE,
        HCI_DEBUG_KEYS,
        HCI_UNREGISTER,
+       HCI_USER_CHANNEL,
 
        HCI_LE_SCAN,
        HCI_SSP_ENABLED,
        HCI_HS_ENABLED,
        HCI_LE_ENABLED,
-       HCI_LE_PERIPHERAL,
+       HCI_ADVERTISING,
        HCI_CONNECTABLE,
        HCI_DISCOVERABLE,
        HCI_LINK_SECURITY,
        HCI_PERIODIC_INQ,
        HCI_FAST_CONNECTABLE,
+       HCI_BREDR_ENABLED,
 };
 
 /* A mask for the flags that are supposed to remain when a reset happens
@@ -623,6 +632,24 @@ struct hci_rp_logical_link_cancel {
        __u8     flow_spec_id;
 } __packed;
 
+#define HCI_OP_SET_CSB                 0x0441
+struct hci_cp_set_csb {
+       __u8    enable;
+       __u8    lt_addr;
+       __u8    lpo_allowed;
+       __le16  packet_type;
+       __le16  interval_min;
+       __le16  interval_max;
+       __le16  csb_sv_tout;
+} __packed;
+struct hci_rp_set_csb {
+       __u8    status;
+       __u8    lt_addr;
+       __le16  interval;
+} __packed;
+
+#define HCI_OP_START_SYNC_TRAIN                0x0443
+
 #define HCI_OP_SNIFF_MODE              0x0803
 struct hci_cp_sniff_mode {
        __le16   handle;
@@ -693,9 +720,6 @@ struct hci_cp_sniff_subrate {
 } __packed;
 
 #define HCI_OP_SET_EVENT_MASK          0x0c01
-struct hci_cp_set_event_mask {
-       __u8     mask[8];
-} __packed;
 
 #define HCI_OP_RESET                   0x0c03
 
@@ -791,6 +815,12 @@ struct hci_cp_host_buffer_size {
        __le16   sco_max_pkt;
 } __packed;
 
+#define HCI_OP_READ_NUM_SUPPORTED_IAC  0x0c38
+struct hci_rp_read_num_supported_iac {
+       __u8    status;
+       __u8    num_iac;
+} __packed;
+
 #define HCI_OP_WRITE_INQUIRY_MODE      0x0c45
 
 #define HCI_MAX_EIR_LENGTH             240
@@ -825,6 +855,10 @@ struct hci_rp_read_inq_rsp_tx_power {
        __s8     tx_power;
 } __packed;
 
+#define HCI_OP_SET_EVENT_MASK_PAGE_2   0x0c63
+
+#define HCI_OP_READ_LOCATION_DATA      0x0c64
+
 #define HCI_OP_READ_FLOW_CONTROL_MODE  0x0c66
 struct hci_rp_read_flow_control_mode {
        __u8     status;
@@ -837,6 +871,50 @@ struct hci_cp_write_le_host_supported {
        __u8    simul;
 } __packed;
 
+#define HCI_OP_SET_RESERVED_LT_ADDR    0x0c74
+struct hci_cp_set_reserved_lt_addr {
+       __u8    lt_addr;
+} __packed;
+struct hci_rp_set_reserved_lt_addr {
+       __u8    status;
+       __u8    lt_addr;
+} __packed;
+
+#define HCI_OP_DELETE_RESERVED_LT_ADDR 0x0c75
+struct hci_cp_delete_reserved_lt_addr {
+       __u8    lt_addr;
+} __packed;
+struct hci_rp_delete_reserved_lt_addr {
+       __u8    status;
+       __u8    lt_addr;
+} __packed;
+
+#define HCI_OP_SET_CSB_DATA            0x0c76
+struct hci_cp_set_csb_data {
+       __u8    lt_addr;
+       __u8    fragment;
+       __u8    data_length;
+       __u8    data[HCI_MAX_CSB_DATA_SIZE];
+} __packed;
+struct hci_rp_set_csb_data {
+       __u8    status;
+       __u8    lt_addr;
+} __packed;
+
+#define HCI_OP_READ_SYNC_TRAIN_PARAMS  0x0c77
+
+#define HCI_OP_WRITE_SYNC_TRAIN_PARAMS 0x0c78
+struct hci_cp_write_sync_train_params {
+       __le16  interval_min;
+       __le16  interval_max;
+       __le32  sync_train_tout;
+       __u8    service_data;
+} __packed;
+struct hci_rp_write_sync_train_params {
+       __u8    status;
+       __le16  sync_train_int;
+} __packed;
+
 #define HCI_OP_READ_LOCAL_VERSION      0x1001
 struct hci_rp_read_local_version {
        __u8     status;
@@ -974,6 +1052,25 @@ struct hci_rp_le_read_local_features {
        __u8     features[8];
 } __packed;
 
+#define HCI_OP_LE_SET_RANDOM_ADDR      0x2005
+
+#define LE_ADV_IND                     0x00
+#define LE_ADV_DIRECT_IND              0x01
+#define LE_ADV_SCAN_IND                        0x02
+#define LE_ADV_NONCONN_IND             0x03
+
+#define HCI_OP_LE_SET_ADV_PARAM                0x2006
+struct hci_cp_le_set_adv_param {
+       __le16   min_interval;
+       __le16   max_interval;
+       __u8     type;
+       __u8     own_address_type;
+       __u8     direct_addr_type;
+       bdaddr_t direct_addr;
+       __u8     channel_map;
+       __u8     filter_policy;
+} __packed;
+
 #define HCI_OP_LE_READ_ADV_TX_POWER    0x2007
 struct hci_rp_le_read_adv_tx_power {
        __u8    status;
@@ -1437,6 +1534,13 @@ struct hci_ev_num_comp_blocks {
        struct hci_comp_blocks_info handles[0];
 } __packed;
 
+#define HCI_EV_SYNC_TRAIN_COMPLETE     0x4F
+struct hci_ev_sync_train_complete {
+       __u8    status;
+} __packed;
+
+#define HCI_EV_SLAVE_PAGE_RESP_TIMEOUT 0x54
+
 /* Low energy meta events */
 #define LE_CONN_ROLE_MASTER    0x00
 
@@ -1570,6 +1674,7 @@ struct sockaddr_hci {
 #define HCI_DEV_NONE   0xffff
 
 #define HCI_CHANNEL_RAW                0
+#define HCI_CHANNEL_USER       1
 #define HCI_CHANNEL_MONITOR    2
 #define HCI_CHANNEL_CONTROL    3