void pci_devs_phb_init(void);
void pci_devs_phb_init_dynamic(struct pci_controller *phb);
+int setup_phb(struct device_node *dev, struct pci_controller *phb);
void __devinit scan_phb(struct pci_controller *hose);
/* From rtas_pci.h */
void pci_addr_cache_build(void);
struct pci_dev *pci_get_device_by_addr(unsigned long addr);
-void eeh_save_bars(struct pci_dev * pdev, struct pci_dn *pdn);
-
/**
* eeh_slot_error_detail -- record and EEH error condition to the log
* @severity: 1 if temporary, 2 if permanent failure.
*/
void eeh_slot_error_detail (struct pci_dn *pdn, int severity);
+/**
+ * rtas_pci_enableo - enable IO transfers for this slot
+ * @pdn: pci device node
+ * @function: either EEH_THAW_MMIO or EEH_THAW_DMA
+ *
+ * Enable I/O transfers to this slot
+ */
+#define EEH_THAW_MMIO 2
+#define EEH_THAW_DMA 3
+int rtas_pci_enable(struct pci_dn *pdn, int function);
+
/**
* rtas_set_slot_reset -- unfreeze a frozen slot
*
void rtas_configure_bridge(struct pci_dn *);
int rtas_write_config(struct pci_dn *, int where, int size, u32 val);
+int rtas_read_config(struct pci_dn *, int where, int size, u32 *val);
/**
* mark and clear slots: find "partition endpoint" PE and set or