[IA64] Add support for vector domain

[pandora-kernel.git] / include / asm-ia64 / hw_irq.h

diff --git a/include/asm-ia64/hw_irq.h b/include/asm-ia64/hw_irq.h
index 0cf119b..97ea390 100644 (file)
--- a/include/asm-ia64/hw_irq.h
+++ b/include/asm-ia64/hw_irq.h
@@ -47,15 +47,26 @@ typedef u8 ia64_vector;
 #define IA64_CMC_VECTOR                        0x1f    /* corrected machine-check interrupt vector */
 /*
  * Vectors 0x20-0x2f are reserved for legacy ISA IRQs.
+ * Use vectors 0x30-0xe7 as the default device vector range for ia64.
+ * Platforms may choose to reduce this range in platform_irq_setup, but the
+ * platform range must fall within
+ *     [IA64_DEF_FIRST_DEVICE_VECTOR..IA64_DEF_LAST_DEVICE_VECTOR]
  */
-#define IA64_FIRST_DEVICE_VECTOR       0x30
-#define IA64_LAST_DEVICE_VECTOR                0xe7
+extern int ia64_first_device_vector;
+extern int ia64_last_device_vector;
+
+#define IA64_DEF_FIRST_DEVICE_VECTOR   0x30
+#define IA64_DEF_LAST_DEVICE_VECTOR    0xe7
+#define IA64_FIRST_DEVICE_VECTOR       ia64_first_device_vector
+#define IA64_LAST_DEVICE_VECTOR                ia64_last_device_vector
+#define IA64_MAX_DEVICE_VECTORS                (IA64_DEF_LAST_DEVICE_VECTOR - IA64_DEF_FIRST_DEVICE_VECTOR + 1)
 #define IA64_NUM_DEVICE_VECTORS                (IA64_LAST_DEVICE_VECTOR - IA64_FIRST_DEVICE_VECTOR + 1)
 
 #define IA64_MCA_RENDEZ_VECTOR         0xe8    /* MCA rendez interrupt */
 #define IA64_PERFMON_VECTOR            0xee    /* performanc monitor interrupt vector */
 #define IA64_TIMER_VECTOR              0xef    /* use highest-prio group 15 interrupt for timer */
 #define        IA64_MCA_WAKEUP_VECTOR          0xf0    /* MCA wakeup (must be >MCA_RENDEZ_VECTOR) */
+#define IA64_IPI_LOCAL_TLB_FLUSH       0xfc    /* SMP flush local TLB */
 #define IA64_IPI_RESCHEDULE            0xfd    /* SMP reschedule */
 #define IA64_IPI_VECTOR                        0xfe    /* inter-processor interrupt vector */
 
@@ -79,15 +90,28 @@ enum {
 extern __u8 isa_irq_to_vector_map[16];
 #define isa_irq_to_vector(x)   isa_irq_to_vector_map[(x)]
 
+struct irq_cfg {
+       ia64_vector vector;
+       cpumask_t domain;
+};
+extern spinlock_t vector_lock;
+extern struct irq_cfg irq_cfg[NR_IRQS];
+#define irq_to_domain(x)       irq_cfg[(x)].domain
+DECLARE_PER_CPU(int[IA64_NUM_VECTORS], vector_irq);
+
 extern struct hw_interrupt_type irq_type_ia64_lsapic;  /* CPU-internal interrupt controller */
 
+extern int bind_irq_vector(int irq, int vector, cpumask_t domain);
 extern int assign_irq_vector (int irq);        /* allocate a free vector */
 extern void free_irq_vector (int vector);
+extern int reserve_irq_vector (int vector);
+extern void __setup_vector_irq(int cpu);
 extern void ia64_send_ipi (int cpu, int vector, int delivery_mode, int redirect);
 extern void register_percpu_irq (ia64_vector vec, struct irqaction *action);
+extern int check_irq_used (int irq);
+extern void destroy_and_reserve_irq (unsigned int irq);
 
-static inline void
-hw_resend_irq (struct hw_interrupt_type *h, unsigned int vector)
+static inline void ia64_resend_irq(unsigned int vector)
 {
        platform_send_ipi(smp_processor_id(), vector, IA64_IPI_DM_INT, 0);
 }
@@ -102,7 +126,7 @@ extern irq_desc_t irq_desc[NR_IRQS];
 static inline unsigned int
 __ia64_local_vector_to_irq (ia64_vector vec)
 {
-       return (unsigned int) vec;
+       return __get_cpu_var(vector_irq)[vec];
 }
 #endif
 
@@ -120,7 +144,7 @@ __ia64_local_vector_to_irq (ia64_vector vec)
 static inline ia64_vector
 irq_to_vector (int irq)
 {
-       return (ia64_vector) irq;
+       return irq_cfg[irq].vector;
 }
 
 /*