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fix file specification in comments
[pandora-kernel.git] / include / asm-arm / arch-omap / pm.h
diff --git a/include/asm-arm/arch-omap/pm.h b/include/asm-arm/arch-omap/pm.h
index 7c79042..1458805 100644 (file)
--- a/include/asm-arm/arch-omap/pm.h
+++ b/include/asm-arm/arch-omap/pm.h
@@ -1,5 +1,5 @@
 /*
- * linux/include/asm/arch-omap/pm.h
+ * linux/include/asm-arm/arch-omap/pm.h
  *
  * Header file for OMAP Power Management Routines
  *
@@ -49,7 +49,7 @@
 
 /*
  * ----------------------------------------------------------------------------
- * Powermanagement bitmasks
+ * Power management bitmasks
  * ----------------------------------------------------------------------------
  */
 #define IDLE_WAIT_CYCLES               0x00000fff
@@ -112,32 +112,59 @@
 #endif
 
 #ifndef __ASSEMBLER__
+
+#include <linux/clk.h>
+
+extern void prevent_idle_sleep(void);
+extern void allow_idle_sleep(void);
+
+/**
+ * clk_deny_idle - Prevents the clock from being idled during MPU idle
+ * @clk: clock signal handle
+ */
+void clk_deny_idle(struct clk *clk);
+
+/**
+ * clk_allow_idle - Counters previous clk_deny_idle
+ * @clk: clock signal handle
+ */
+void clk_deny_idle(struct clk *clk);
+
 extern void omap_pm_idle(void);
 extern void omap_pm_suspend(void);
 extern void omap730_cpu_suspend(unsigned short, unsigned short);
 extern void omap1510_cpu_suspend(unsigned short, unsigned short);
 extern void omap1610_cpu_suspend(unsigned short, unsigned short);
+extern void omap24xx_cpu_suspend(u32 dll_ctrl, u32 cpu_revision);
 extern void omap730_idle_loop_suspend(void);
 extern void omap1510_idle_loop_suspend(void);
 extern void omap1610_idle_loop_suspend(void);
+extern void omap24xx_idle_loop_suspend(void);
+
+extern unsigned int omap730_cpu_suspend_sz;
+extern unsigned int omap1510_cpu_suspend_sz;
+extern unsigned int omap1610_cpu_suspend_sz;
+extern unsigned int omap24xx_cpu_suspend_sz;
+extern unsigned int omap730_idle_loop_suspend_sz;
+extern unsigned int omap1510_idle_loop_suspend_sz;
+extern unsigned int omap1610_idle_loop_suspend_sz;
+extern unsigned int omap24xx_idle_loop_suspend_sz;
 
 #ifdef CONFIG_OMAP_SERIAL_WAKE
 extern void omap_serial_wake_trigger(int enable);
 #else
+#define omap_serial_wakeup_init()      {}
 #define omap_serial_wake_trigger(x)    {}
 #endif /* CONFIG_OMAP_SERIAL_WAKE */
 
-extern unsigned int omap730_cpu_suspend_sz;
-extern unsigned int omap730_idle_loop_suspend_sz;
-extern unsigned int omap1510_cpu_suspend_sz;
-extern unsigned int omap1510_idle_loop_suspend_sz;
-extern unsigned int omap1610_cpu_suspend_sz;
-extern unsigned int omap1610_idle_loop_suspend_sz;
-
 #define ARM_SAVE(x) arm_sleep_save[ARM_SLEEP_SAVE_##x] = omap_readl(x)
 #define ARM_RESTORE(x) omap_writel((arm_sleep_save[ARM_SLEEP_SAVE_##x]), (x))
 #define ARM_SHOW(x) arm_sleep_save[ARM_SLEEP_SAVE_##x]
 
+#define DSP_SAVE(x) dsp_sleep_save[DSP_SLEEP_SAVE_##x] = __raw_readw(x)
+#define DSP_RESTORE(x) __raw_writew((dsp_sleep_save[DSP_SLEEP_SAVE_##x]), (x))
+#define DSP_SHOW(x) dsp_sleep_save[DSP_SLEEP_SAVE_##x]
+
 #define ULPD_SAVE(x) ulpd_sleep_save[ULPD_SLEEP_SAVE_##x] = omap_readw(x)
 #define ULPD_RESTORE(x) omap_writew((ulpd_sleep_save[ULPD_SLEEP_SAVE_##x]), (x))
 #define ULPD_SHOW(x) ulpd_sleep_save[ULPD_SLEEP_SAVE_##x]
@@ -154,6 +181,10 @@ extern unsigned int omap1610_idle_loop_suspend_sz;
 #define MPUI1610_RESTORE(x) omap_writel((mpui1610_sleep_save[MPUI1610_SLEEP_SAVE_##x]), (x))
 #define MPUI1610_SHOW(x) mpui1610_sleep_save[MPUI1610_SLEEP_SAVE_##x]
 
+#define OMAP24XX_SAVE(x) omap24xx_sleep_save[OMAP24XX_SLEEP_SAVE_##x] = x
+#define OMAP24XX_RESTORE(x) x = omap24xx_sleep_save[OMAP24XX_SLEEP_SAVE_##x]
+#define OMAP24XX_SHOW(x) omap24xx_sleep_save[OMAP24XX_SLEEP_SAVE_##x]
+
 /*
  * List of global OMAP registers to preserve.
  * More ones like CP and general purpose register values are preserved
@@ -176,6 +207,15 @@ enum arm_save_state {
        ARM_SLEEP_SAVE_SIZE
 };
 
+enum dsp_save_state {
+       DSP_SLEEP_SAVE_START = 0,
+       /*
+        * DSP registers 16 bits
+        */
+       DSP_SLEEP_SAVE_DSP_IDLECT2,
+       DSP_SLEEP_SAVE_SIZE
+};
+
 enum ulpd_save_state {
        ULPD_SLEEP_SAVE_START = 0,
        /*
@@ -254,5 +294,63 @@ enum mpui1610_save_state {
 #endif
 };
 
+enum omap24xx_save_state {
+       OMAP24XX_SLEEP_SAVE_START = 0,
+       OMAP24XX_SLEEP_SAVE_INTC_MIR0,
+       OMAP24XX_SLEEP_SAVE_INTC_MIR1,
+       OMAP24XX_SLEEP_SAVE_INTC_MIR2,
+
+       OMAP24XX_SLEEP_SAVE_CM_CLKSTCTRL_MPU,
+       OMAP24XX_SLEEP_SAVE_CM_CLKSTCTRL_CORE,
+       OMAP24XX_SLEEP_SAVE_CM_CLKSTCTRL_GFX,
+       OMAP24XX_SLEEP_SAVE_CM_CLKSTCTRL_DSP,
+       OMAP24XX_SLEEP_SAVE_CM_CLKSTCTRL_MDM,
+
+       OMAP24XX_SLEEP_SAVE_PM_PWSTCTRL_MPU,
+       OMAP24XX_SLEEP_SAVE_PM_PWSTCTRL_CORE,
+       OMAP24XX_SLEEP_SAVE_PM_PWSTCTRL_GFX,
+       OMAP24XX_SLEEP_SAVE_PM_PWSTCTRL_DSP,
+       OMAP24XX_SLEEP_SAVE_PM_PWSTCTRL_MDM,
+
+       OMAP24XX_SLEEP_SAVE_CM_IDLEST1_CORE,
+       OMAP24XX_SLEEP_SAVE_CM_IDLEST2_CORE,
+       OMAP24XX_SLEEP_SAVE_CM_IDLEST3_CORE,
+       OMAP24XX_SLEEP_SAVE_CM_IDLEST4_CORE,
+       OMAP24XX_SLEEP_SAVE_CM_IDLEST_GFX,
+       OMAP24XX_SLEEP_SAVE_CM_IDLEST_WKUP,
+       OMAP24XX_SLEEP_SAVE_CM_IDLEST_CKGEN,
+       OMAP24XX_SLEEP_SAVE_CM_IDLEST_DSP,
+       OMAP24XX_SLEEP_SAVE_CM_IDLEST_MDM,
+
+       OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE1_CORE,
+       OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE2_CORE,
+       OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE3_CORE,
+       OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE4_CORE,
+       OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE_WKUP,
+       OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE_PLL,
+       OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE_DSP,
+       OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE_MDM,
+
+       OMAP24XX_SLEEP_SAVE_CM_FCLKEN1_CORE,
+       OMAP24XX_SLEEP_SAVE_CM_FCLKEN2_CORE,
+       OMAP24XX_SLEEP_SAVE_CM_ICLKEN1_CORE,
+       OMAP24XX_SLEEP_SAVE_CM_ICLKEN2_CORE,
+       OMAP24XX_SLEEP_SAVE_CM_ICLKEN3_CORE,
+       OMAP24XX_SLEEP_SAVE_CM_ICLKEN4_CORE,
+       OMAP24XX_SLEEP_SAVE_GPIO1_IRQENABLE1,
+       OMAP24XX_SLEEP_SAVE_GPIO2_IRQENABLE1,
+       OMAP24XX_SLEEP_SAVE_GPIO3_IRQENABLE1,
+       OMAP24XX_SLEEP_SAVE_GPIO4_IRQENABLE1,
+       OMAP24XX_SLEEP_SAVE_GPIO3_OE,
+       OMAP24XX_SLEEP_SAVE_GPIO4_OE,
+       OMAP24XX_SLEEP_SAVE_GPIO3_RISINGDETECT,
+       OMAP24XX_SLEEP_SAVE_GPIO3_FALLINGDETECT,
+       OMAP24XX_SLEEP_SAVE_CONTROL_PADCONF_SPI1_NCS2,
+       OMAP24XX_SLEEP_SAVE_CONTROL_PADCONF_MCBSP1_DX,
+       OMAP24XX_SLEEP_SAVE_CONTROL_PADCONF_SSI1_FLAG_TX,
+       OMAP24XX_SLEEP_SAVE_CONTROL_PADCONF_SYS_NIRQW0,
+       OMAP24XX_SLEEP_SAVE_SIZE
+};
+
 #endif /* ASSEMBLER */
 #endif /* __ASM_ARCH_OMAP_PM_H */
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