Merge branch 'viafb-next' of git://github.com/schandinat/linux-2.6

[pandora-kernel.git] / drivers / video / via / hw.c

diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c
index 00fecb5..36d73f9 100644 (file)
--- a/drivers/video/via/hw.c
+++ b/drivers/video/via/hw.c
@@ -719,9 +719,9 @@ static struct rgbLUT palLUT_table[] = {
 };
 
 static struct via_device_mapping device_mapping[] = {
-       {VIA_6C, "6C"},
-       {VIA_93, "93"},
-       {VIA_96, "96"},
+       {VIA_LDVP0, "LDVP0"},
+       {VIA_LDVP1, "LDVP1"},
+       {VIA_DVP0, "DVP0"},
        {VIA_CRT, "CRT"},
        {VIA_DVP1, "DVP1"},
        {VIA_LVDS1, "LVDS1"},
@@ -763,11 +763,11 @@ static u32 get_dvi_devices(int output_interface)
 {
        switch (output_interface) {
        case INTERFACE_DVP0:
-               return VIA_96 | VIA_6C;
+               return VIA_DVP0 | VIA_LDVP0;
 
        case INTERFACE_DVP1:
                if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266)
-                       return VIA_93;
+                       return VIA_LDVP1;
                else
                        return VIA_DVP1;
 
@@ -775,7 +775,7 @@ static u32 get_dvi_devices(int output_interface)
                if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266)
                        return 0;
                else
-                       return VIA_LVDS2 | VIA_96;
+                       return VIA_LVDS2 | VIA_DVP0;
 
        case INTERFACE_DFP_LOW:
                if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266)
@@ -794,13 +794,13 @@ static u32 get_lcd_devices(int output_interface)
 {
        switch (output_interface) {
        case INTERFACE_DVP0:
-               return VIA_96;
+               return VIA_DVP0;
 
        case INTERFACE_DVP1:
                return VIA_DVP1;
 
        case INTERFACE_DFP_HIGH:
-               return VIA_LVDS2 | VIA_96;
+               return VIA_LVDS2 | VIA_DVP0;
 
        case INTERFACE_DFP_LOW:
                return VIA_LVDS1 | VIA_DVP1;
@@ -988,17 +988,17 @@ static void set_crt_source(u8 iga)
        via_write_reg_mask(VIASR, 0x16, value, 0x40);
 }
 
-static inline void set_6C_source(u8 iga)
+static inline void set_ldvp0_source(u8 iga)
 {
        set_source_common(0x6C, 7, iga);
 }
 
-static inline void set_93_source(u8 iga)
+static inline void set_ldvp1_source(u8 iga)
 {
        set_source_common(0x93, 7, iga);
 }
 
-static inline void set_96_source(u8 iga)
+static inline void set_dvp0_source(u8 iga)
 {
        set_source_common(0x96, 4, iga);
 }
@@ -1020,12 +1020,12 @@ static inline void set_lvds2_source(u8 iga)
 
 void via_set_source(u32 devices, u8 iga)
 {
-       if (devices & VIA_6C)
-               set_6C_source(iga);
-       if (devices & VIA_93)
-               set_93_source(iga);
-       if (devices & VIA_96)
-               set_96_source(iga);
+       if (devices & VIA_LDVP0)
+               set_ldvp0_source(iga);
+       if (devices & VIA_LDVP1)
+               set_ldvp1_source(iga);
+       if (devices & VIA_DVP0)
+               set_dvp0_source(iga);
        if (devices & VIA_CRT)
                set_crt_source(iga);
        if (devices & VIA_DVP1)
@@ -1060,7 +1060,7 @@ static void set_crt_state(u8 state)
        via_write_reg_mask(VIACR, 0x36, value, 0x30);
 }
 
-static void set_96_state(u8 state)
+static void set_dvp0_state(u8 state)
 {
        u8 value;
 
@@ -1136,11 +1136,11 @@ void via_set_state(u32 devices, u8 state)
 {
        /*
        TODO: Can we enable/disable these devices? How?
-       if (devices & VIA_6C)
-       if (devices & VIA_93)
+       if (devices & VIA_LDVP0)
+       if (devices & VIA_LDVP1)
        */
-       if (devices & VIA_96)
-               set_96_state(state);
+       if (devices & VIA_DVP0)
+               set_dvp0_state(state);
        if (devices & VIA_CRT)
                set_crt_state(state);
        if (devices & VIA_DVP1)
@@ -1429,6 +1429,15 @@ void viafb_load_FIFO_reg(int set_iga, int hor_active, int ver_active)
                            VX855_IGA1_DISPLAY_QUEUE_EXPIRE_NUM;
                }
 
+               if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_VX900) {
+                       iga1_fifo_max_depth = VX900_IGA1_FIFO_MAX_DEPTH;
+                       iga1_fifo_threshold = VX900_IGA1_FIFO_THRESHOLD;
+                       iga1_fifo_high_threshold =
+                           VX900_IGA1_FIFO_HIGH_THRESHOLD;
+                       iga1_display_queue_expire_num =
+                           VX900_IGA1_DISPLAY_QUEUE_EXPIRE_NUM;
+               }
+
                /* Set Display FIFO Depath Select */
                reg_value = IGA1_FIFO_DEPTH_SELECT_FORMULA(iga1_fifo_max_depth);
                viafb_load_reg_num =
@@ -1569,6 +1578,15 @@ void viafb_load_FIFO_reg(int set_iga, int hor_active, int ver_active)
                            VX855_IGA2_DISPLAY_QUEUE_EXPIRE_NUM;
                }
 
+               if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_VX900) {
+                       iga2_fifo_max_depth = VX900_IGA2_FIFO_MAX_DEPTH;
+                       iga2_fifo_threshold = VX900_IGA2_FIFO_THRESHOLD;
+                       iga2_fifo_high_threshold =
+                           VX900_IGA2_FIFO_HIGH_THRESHOLD;
+                       iga2_display_queue_expire_num =
+                           VX900_IGA2_DISPLAY_QUEUE_EXPIRE_NUM;
+               }
+
                if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_K800) {
                        /* Set Display FIFO Depath Select */
                        reg_value =
@@ -1689,6 +1707,7 @@ u32 viafb_get_clk_value(int clk)
                        break;
 
                case UNICHROME_VX855:
+               case UNICHROME_VX900:
                        value = vx855_encode_pll(pll_value[i].vx855_pll);
                        break;
                }
@@ -1722,6 +1741,7 @@ void viafb_set_vclock(u32 clk, int set_iga)
                case UNICHROME_P4M900:
                case UNICHROME_VX800:
                case UNICHROME_VX855:
+               case UNICHROME_VX900:
                        via_write_reg(VIASR, SR44, (clk & 0x0000FF));
                        via_write_reg(VIASR, SR45, (clk & 0x00FF00) >> 8);
                        via_write_reg(VIASR, SR46, (clk & 0xFF0000) >> 16);
@@ -1748,6 +1768,7 @@ void viafb_set_vclock(u32 clk, int set_iga)
                case UNICHROME_P4M900:
                case UNICHROME_VX800:
                case UNICHROME_VX855:
+               case UNICHROME_VX900:
                        via_write_reg(VIASR, SR4A, (clk & 0x0000FF));
                        via_write_reg(VIASR, SR4B, (clk & 0x00FF00) >> 8);
                        via_write_reg(VIASR, SR4C, (clk & 0xFF0000) >> 16);
@@ -2179,6 +2200,7 @@ static void __devinit init_gfx_chip_info(int chip_type)
        switch (viaparinfo->chip_info->gfx_chip_name) {
        case UNICHROME_VX800:
        case UNICHROME_VX855:
+       case UNICHROME_VX900:
                viaparinfo->chip_info->twod_engine = VIA_2D_ENG_M1;
                break;
        case UNICHROME_K8M890:
@@ -2403,6 +2425,7 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp,
                break;
 
        case UNICHROME_VX855:
+       case UNICHROME_VX900:
                viafb_write_regx(VX855_ModeXregs, NUM_TOTAL_VX855_ModeXregs);
                break;
        }