/*
* Ensure that updates to the QH will
- * occure before priming.
+ * occur before priming.
*/
wmb();
& EP_QUEUE_HEAD_NEXT_POINTER_MASK;;
dqh->size_ioc_int_sts = 0;
- /* Ensure that updates to the QH will occure before priming. */
+ /* Ensure that updates to the QH will occur before priming. */
wmb();
/* Prime the Endpoint */
return IRQ_NONE;
}
- /* Clear all the interrupts occured */
+ /* Clear all the interrupts occurred */
writel(status, &udc->op_regs->usbsts);
if (status & USBSTS_ERR)
}
#ifdef CONFIG_PM
-static int mv_udc_suspend(struct platform_device *_dev, pm_message_t state)
+static int mv_udc_suspend(struct device *_dev)
{
struct mv_udc *udc = the_controller;
return 0;
}
-static int mv_udc_resume(struct platform_device *_dev)
+static int mv_udc_resume(struct device *_dev)
{
struct mv_udc *udc = the_controller;
int retval;
retval = mv_udc_phy_init(udc->phy_regs);
if (retval) {
dev_err(_dev, "phy initialization error %d\n", retval);
- goto error;
+ return retval;
}
udc_reset(udc);
ep0_reset(udc);
.owner = THIS_MODULE,
.name = "pxa-u2o",
#ifdef CONFIG_PM
- .pm = mv_udc_pm_ops,
+ .pm = &mv_udc_pm_ops,
#endif
},
};