#define DAQBOARD2000_DAQ_SIZE 0x1002
#define DAQBOARD2000_PLX_SIZE 0x100
-// Initialization bits for the Serial EEPROM Control Register
+/* Initialization bits for the Serial EEPROM Control Register */
#define DAQBOARD2000_SECRProgPinHi 0x8001767e
#define DAQBOARD2000_SECRProgPinLo 0x8000767e
#define DAQBOARD2000_SECRLocalBusHi 0xc000767e
#define DAQBOARD2000_SECRReloadHi 0xa000767e
#define DAQBOARD2000_SECRReloadLo 0x8000767e
-// SECR status bits
+/* SECR status bits */
#define DAQBOARD2000_EEPROM_PRESENT 0x10000000
-// CPLD status bits
+/* CPLD status bits */
#define DAQBOARD2000_CPLD_INIT 0x0002
#define DAQBOARD2000_CPLD_DONE 0x0004
-// Available ranges
+/* Available ranges */
static const struct comedi_lrange range_daqboard2000_ai = { 13, {
RANGE(-10, 10),
RANGE(-5, 5),
};
struct daqboard2000_hw {
- volatile u16 acqControl; // 0x00
- volatile u16 acqScanListFIFO; // 0x02
- volatile u32 acqPacerClockDivLow; // 0x04
-
- volatile u16 acqScanCounter; // 0x08
- volatile u16 acqPacerClockDivHigh; // 0x0a
- volatile u16 acqTriggerCount; // 0x0c
- volatile u16 fill2; // 0x0e
- volatile u16 acqResultsFIFO; // 0x10
- volatile u16 fill3; // 0x12
- volatile u16 acqResultsShadow; // 0x14
- volatile u16 fill4; // 0x16
- volatile u16 acqAdcResult; // 0x18
- volatile u16 fill5; // 0x1a
- volatile u16 dacScanCounter; // 0x1c
- volatile u16 fill6; // 0x1e
-
- volatile u16 dacControl; // 0x20
- volatile u16 fill7; // 0x22
- volatile s16 dacFIFO; // 0x24
- volatile u16 fill8[2]; // 0x26
- volatile u16 dacPacerClockDiv; // 0x2a
- volatile u16 refDacs; // 0x2c
- volatile u16 fill9; // 0x2e
-
- volatile u16 dioControl; // 0x30
- volatile s16 dioP3hsioData; // 0x32
- volatile u16 dioP3Control; // 0x34
- volatile u16 calEepromControl; // 0x36
- volatile s16 dacSetting[4]; // 0x38
- volatile s16 dioP2ExpansionIO8Bit[32]; // 0x40
-
- volatile u16 ctrTmrControl; // 0x80
- volatile u16 fill10[3]; // 0x82
- volatile s16 ctrInput[4]; // 0x88
- volatile u16 fill11[8]; // 0x90
- volatile u16 timerDivisor[2]; // 0xa0
- volatile u16 fill12[6]; // 0xa4
-
- volatile u16 dmaControl; // 0xb0
- volatile u16 trigControl; // 0xb2
- volatile u16 fill13[2]; // 0xb4
- volatile u16 calEeprom; // 0xb8
- volatile u16 acqDigitalMark; // 0xba
- volatile u16 trigDacs; // 0xbc
- volatile u16 fill14; // 0xbe
- volatile s16 dioP2ExpansionIO16Bit[32]; // 0xc0
+ volatile u16 acqControl; /* 0x00 */
+ volatile u16 acqScanListFIFO; /* 0x02 */
+ volatile u32 acqPacerClockDivLow; /* 0x04 */
+
+ volatile u16 acqScanCounter; /* 0x08 */
+ volatile u16 acqPacerClockDivHigh; /* 0x0a */
+ volatile u16 acqTriggerCount; /* 0x0c */
+ volatile u16 fill2; /* 0x0e */
+ volatile u16 acqResultsFIFO; /* 0x10 */
+ volatile u16 fill3; /* 0x12 */
+ volatile u16 acqResultsShadow; /* 0x14 */
+ volatile u16 fill4; /* 0x16 */
+ volatile u16 acqAdcResult; /* 0x18 */
+ volatile u16 fill5; /* 0x1a */
+ volatile u16 dacScanCounter; /* 0x1c */
+ volatile u16 fill6; /* 0x1e */
+
+ volatile u16 dacControl; /* 0x20 */
+ volatile u16 fill7; /* 0x22 */
+ volatile s16 dacFIFO; /* 0x24 */
+ volatile u16 fill8[2]; /* 0x26 */
+ volatile u16 dacPacerClockDiv; /* 0x2a */
+ volatile u16 refDacs; /* 0x2c */
+ volatile u16 fill9; /* 0x2e */
+
+ volatile u16 dioControl; /* 0x30 */
+ volatile s16 dioP3hsioData; /* 0x32 */
+ volatile u16 dioP3Control; /* 0x34 */
+ volatile u16 calEepromControl; /* 0x36 */
+ volatile s16 dacSetting[4]; /* 0x38 */
+ volatile s16 dioP2ExpansionIO8Bit[32]; /* 0x40 */
+
+ volatile u16 ctrTmrControl; /* 0x80 */
+ volatile u16 fill10[3]; /* 0x82 */
+ volatile s16 ctrInput[4]; /* 0x88 */
+ volatile u16 fill11[8]; /* 0x90 */
+ volatile u16 timerDivisor[2]; /* 0xa0 */
+ volatile u16 fill12[6]; /* 0xa4 */
+
+ volatile u16 dmaControl; /* 0xb0 */
+ volatile u16 trigControl; /* 0xb2 */
+ volatile u16 fill13[2]; /* 0xb4 */
+ volatile u16 calEeprom; /* 0xb8 */
+ volatile u16 acqDigitalMark; /* 0xba */
+ volatile u16 trigDacs; /* 0xbc */
+ volatile u16 fill14; /* 0xbe */
+ volatile s16 dioP2ExpansionIO16Bit[32]; /* 0xc0 */
};
/* Scan Sequencer programming */
#define DAQBOARD2000_SeqStartScanList 0x0011
#define DAQBOARD2000_SeqStopScanList 0x0010
-// Prepare for acquisition
+/* Prepare for acquisition */
#define DAQBOARD2000_AcqResetScanListFifo 0x0004
#define DAQBOARD2000_AcqResetResultsFifo 0x0002
#define DAQBOARD2000_AcqResetConfigPipe 0x0001
-// Acqusition status bits
+/* Acqusition status bits */
#define DAQBOARD2000_AcqResultsFIFOMore1Sample 0x0001
#define DAQBOARD2000_AcqResultsFIFOHasValidData 0x0002
#define DAQBOARD2000_AcqResultsFIFOOverrun 0x0004
#define DAQBOARD2000_DacPacerOverrun 0x0200
#define DAQBOARD2000_AcqHardwareError 0x01c0
-// Scan Sequencer programming
+/* Scan Sequencer programming */
#define DAQBOARD2000_SeqStartScanList 0x0011
#define DAQBOARD2000_SeqStopScanList 0x0010
#define DAQBOARD2000_AdcPacerInternalOutEnable 0x0008
#define DAQBOARD2000_AdcPacerExternalRising 0x0100
-// DAC status
+/* DAC status */
#define DAQBOARD2000_DacFull 0x0001
#define DAQBOARD2000_RefBusy 0x0002
#define DAQBOARD2000_TrgBusy 0x0004
#define DAQBOARD2000_Dac2Busy 0x0040
#define DAQBOARD2000_Dac3Busy 0x0080
-// DAC control
+/* DAC control */
#define DAQBOARD2000_Dac0Enable 0x0021
#define DAQBOARD2000_Dac1Enable 0x0031
#define DAQBOARD2000_Dac2Enable 0x0041
#define DAQBOARD2000_TrigEnable 0x0001
#define DAQBOARD2000_TrigDisable 0x0000
-// Reference Dac Selection
+/* Reference Dac Selection */
#define DAQBOARD2000_PosRefDacSelect 0x0100
#define DAQBOARD2000_NegRefDacSelect 0x0000
{
struct daqboard2000_hw *fpga = devpriv->daq;
-// comedi_udelay(4);
+/* comedi_udelay(4); */
fpga->acqScanListFIFO = entry & 0x00ff;
-// comedi_udelay(4);
+/* comedi_udelay(4); */
fpga->acqScanListFIFO = (entry >> 8) & 0x00ff;
}
if (fpga->acqControl & DAQBOARD2000_AcqConfigPipeFull) {
break;
}
- //comedi_udelay(2);
+ /* comedi_udelay(2); */
}
fpga->acqControl = DAQBOARD2000_AdcPacerEnable;
for (timeout = 0; timeout < 20; timeout++) {
if (fpga->acqControl & DAQBOARD2000_AcqLogicScanning) {
break;
}
- //comedi_udelay(2);
+ /* comedi_udelay(2); */
}
for (timeout = 0; timeout < 20; timeout++) {
if (fpga->
DAQBOARD2000_AcqResultsFIFOHasValidData) {
break;
}
- //comedi_udelay(2);
+ /* comedi_udelay(2); */
}
data[i] = fpga->acqResultsFIFO;
fpga->acqControl = DAQBOARD2000_AdcPacerDisable;
* OK, since it works OK without enabling the DAC's, let's keep
* it as simple as possible...
*/
- //fpga->dacControl = (chan + 2) * 0x0010 | 0x0001; comedi_udelay(1000);
+ /* fpga->dacControl = (chan + 2) * 0x0010 | 0x0001; comedi_udelay(1000); */
fpga->dacSetting[chan] = data[i];
for (timeout = 0; timeout < 20; timeout++) {
if ((fpga->dacControl & ((chan + 1) * 0x0010)) == 0) {
break;
}
- //comedi_udelay(2);
+ /* comedi_udelay(2); */
}
devpriv->ao_readback[chan] = data[i];
/*
struct daqboard2000_hw *fpga = devpriv->daq;
int timeout;
- // Set the + reference dac value in the FPGA
+ /* Set the + reference dac value in the FPGA */
fpga->refDacs = 0x80 | DAQBOARD2000_PosRefDacSelect;
for (timeout = 0; timeout < 20; timeout++) {
if ((fpga->dacControl & DAQBOARD2000_RefBusy) == 0) {
}
/* printk("DAQBOARD2000_PosRefDacSelect %d\n", timeout);*/
- // Set the - reference dac value in the FPGA
+ /* Set the - reference dac value in the FPGA */
fpga->refDacs = 0x80 | DAQBOARD2000_NegRefDacSelect;
for (timeout = 0; timeout < 20; timeout++) {
if ((fpga->dacControl & DAQBOARD2000_RefBusy) == 0) {
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