pandora: reserve CMA area for c64_tools

[pandora-kernel.git] / drivers / pci / quirks.c

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 6476547..cab24f7 100644 (file)
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -2747,7 +2747,7 @@ static void ricoh_mmc_fixup_r5c832(struct pci_dev *dev)
        if (PCI_FUNC(dev->devfn))
                return;
        /*
-        * RICOH 0xe823 SD/MMC card reader fails to recognize
+        * RICOH 0xe822 and 0xe823 SD/MMC card readers fail to recognize
         * certain types of SD/MMC cards. Lowering the SD base
         * clock frequency from 200Mhz to 50Mhz fixes this issue.
         *
@@ -2758,7 +2758,8 @@ static void ricoh_mmc_fixup_r5c832(struct pci_dev *dev)
         * 0xf9  - Key register for 0x150
         * 0xfc  - key register for 0xe1
         */
-       if (dev->device == PCI_DEVICE_ID_RICOH_R5CE823) {
+       if (dev->device == PCI_DEVICE_ID_RICOH_R5CE822 ||
+           dev->device == PCI_DEVICE_ID_RICOH_R5CE823) {
                pci_write_config_byte(dev, 0xf9, 0xfc);
                pci_write_config_byte(dev, 0x150, 0x10);
                pci_write_config_byte(dev, 0xf9, 0x00);
@@ -2785,6 +2786,8 @@ static void ricoh_mmc_fixup_r5c832(struct pci_dev *dev)
 }
 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5C832, ricoh_mmc_fixup_r5c832);
 DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5C832, ricoh_mmc_fixup_r5c832);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5CE822, ricoh_mmc_fixup_r5c832);
+DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5CE822, ricoh_mmc_fixup_r5c832);
 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5CE823, ricoh_mmc_fixup_r5c832);
 DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5CE823, ricoh_mmc_fixup_r5c832);
 #endif /*CONFIG_MMC_RICOH_MMC*/
@@ -2906,6 +2909,40 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65f8, quirk_intel_mc_errata);
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65f9, quirk_intel_mc_errata);
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65fa, quirk_intel_mc_errata);
 
+/*
+ * Some BIOS implementations leave the Intel GPU interrupts enabled,
+ * even though no one is handling them (f.e. i915 driver is never loaded).
+ * Additionally the interrupt destination is not set up properly
+ * and the interrupt ends up -somewhere-.
+ *
+ * These spurious interrupts are "sticky" and the kernel disables
+ * the (shared) interrupt line after 100.000+ generated interrupts.
+ *
+ * Fix it by disabling the still enabled interrupts.
+ * This resolves crashes often seen on monitor unplug.
+ */
+#define I915_DEIER_REG 0x4400c
+static void __devinit disable_igfx_irq(struct pci_dev *dev)
+{
+       void __iomem *regs = pci_iomap(dev, 0, 0);
+       if (regs == NULL) {
+               dev_warn(&dev->dev, "igfx quirk: Can't iomap PCI device\n");
+               return;
+       }
+
+       /* Check if any interrupt line is still enabled */
+       if (readl(regs + I915_DEIER_REG) != 0) {
+               dev_warn(&dev->dev, "BIOS left Intel GPU interrupts enabled; "
+                       "disabling\n");
+
+               writel(0, regs + I915_DEIER_REG);
+       }
+
+       pci_iounmap(dev, regs);
+}
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0102, disable_igfx_irq);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x010a, disable_igfx_irq);
+
 static void pci_do_fixups(struct pci_dev *dev, struct pci_fixup *f,
                          struct pci_fixup *end)
 {