Merge tag 'r8169-20060920-00' of git://electric-eye.fr.zoreil.com/home/romieu/linux...
[pandora-kernel.git] / drivers / net / wireless / zd1211rw / zd_chip.h
index 8051210..4b12508 100644 (file)
 
 #define CR_RX_FILTER                   CTL_REG(0x068c)
 #define RX_FILTER_ASSOC_RESPONSE       0x0002
+#define RX_FILTER_REASSOC_RESPONSE     0x0008
 #define RX_FILTER_PROBE_RESPONSE       0x0020
 #define RX_FILTER_BEACON               0x0100
+#define RX_FILTER_DISASSOC             0x0400
 #define RX_FILTER_AUTH                 0x0800
-/* Sniff modus sets filter to 0xfffff */
+#define AP_RX_FILTER                   0x0400feff
+#define STA_RX_FILTER                  0x0000ffff
+
+/* Monitor mode sets filter to 0xfffff */
 
 #define CR_ACK_TIMEOUT_EXT             CTL_REG(0x0690)
 #define CR_BCN_FIFO_SEMAPHORE          CTL_REG(0x0694)
+
 #define CR_IFS_VALUE                   CTL_REG(0x0698)
+#define IFS_VALUE_DIFS_SH              0
+#define IFS_VALUE_EIFS_SH              12
+#define IFS_VALUE_SIFS_SH              24
+#define IFS_VALUE_DEFAULT              ((  50 << IFS_VALUE_DIFS_SH) | \
+                                        (1148 << IFS_VALUE_EIFS_SH) | \
+                                        (  10 << IFS_VALUE_SIFS_SH))
+
 #define CR_RX_TIME_OUT                 CTL_REG(0x069C)
 #define CR_TOTAL_RX_FRM                        CTL_REG(0x06A0)
 #define CR_CRC32_CNT                   CTL_REG(0x06A4)
 #define CR_ZD1211B_TXOP                        CTL_REG(0x0b20)
 #define CR_ZD1211B_RETRY_MAX           CTL_REG(0x0b28)
 
-#define AP_RX_FILTER                   0x0400feff
-#define STA_RX_FILTER                  0x0000ffff
-
 #define CWIN_SIZE                      0x007f043f
 
 
@@ -628,6 +638,7 @@ enum {
        LOAD_CODE_SIZE                  = 0xe, /* words */
        LOAD_VECT_SIZE                  = 0x10000 - 0xfff7, /* words */
        EEPROM_REGS_OFFSET              = LOAD_CODE_SIZE + LOAD_VECT_SIZE,
+       EEPROM_REGS_SIZE                = 0x7e, /* words */
        E2P_BASE_OFFSET                 = EEPROM_START_OFFSET +
                                          EEPROM_REGS_OFFSET,
 };
@@ -653,7 +664,7 @@ struct zd_chip {
        /* SetPointOFDM in the vendor driver */
        u8 ofdm_cal_values[3][E2P_CHANNEL_COUNT];
        u8 pa_type:4, patch_cck_gain:1, patch_cr157:1, patch_6m_band_edge:1,
-          is_zd1211b:1;
+          new_phy_layout:1, is_zd1211b:1;
 };
 
 static inline struct zd_chip *zd_usb_to_chip(struct zd_usb *usb)
@@ -737,8 +748,12 @@ static inline int zd_rfwrite_locked(struct zd_chip *chip, u32 value, u8 bits)
        return zd_usb_rfwrite(&chip->usb, value, bits);
 }
 
+int zd_rfwrite_cr_locked(struct zd_chip *chip, u32 value);
+
 int zd_rfwritev_locked(struct zd_chip *chip,
                       const u32* values, unsigned int count, u8 bits);
+int zd_rfwritev_cr_locked(struct zd_chip *chip,
+                         const u32* values, unsigned int count);
 
 /* Locking functions for reading and writing registers.
  * The different parameters are intentional.