unsigned int i;
u32 reg;
+ /*
+ * If driver doesn't wake up firmware here,
+ * rt2800_load_firmware will hang forever when interface is up again.
+ */
+ rt2800_register_write(rt2x00dev, AUTOWAKEUP_CFG, 0x00000000);
+
/*
* Wait for stable hardware.
*/
}
if (flags & CONFIG_UPDATE_MAC) {
- reg = le32_to_cpu(conf->mac[1]);
- rt2x00_set_field32(®, MAC_ADDR_DW1_UNICAST_TO_ME_MASK, 0xff);
- conf->mac[1] = cpu_to_le32(reg);
+ if (!is_zero_ether_addr((const u8 *)conf->mac)) {
+ reg = le32_to_cpu(conf->mac[1]);
+ rt2x00_set_field32(®, MAC_ADDR_DW1_UNICAST_TO_ME_MASK, 0xff);
+ conf->mac[1] = cpu_to_le32(reg);
+ }
rt2800_register_multiwrite(rt2x00dev, MAC_ADDR_DW0,
conf->mac, sizeof(conf->mac));
}
if (flags & CONFIG_UPDATE_BSSID) {
- reg = le32_to_cpu(conf->bssid[1]);
- rt2x00_set_field32(®, MAC_BSSID_DW1_BSS_ID_MASK, 3);
- rt2x00_set_field32(®, MAC_BSSID_DW1_BSS_BCN_NUM, 7);
- conf->bssid[1] = cpu_to_le32(reg);
+ if (!is_zero_ether_addr((const u8 *)conf->bssid)) {
+ reg = le32_to_cpu(conf->bssid[1]);
+ rt2x00_set_field32(®, MAC_BSSID_DW1_BSS_ID_MASK, 3);
+ rt2x00_set_field32(®, MAC_BSSID_DW1_BSS_BCN_NUM, 7);
+ conf->bssid[1] = cpu_to_le32(reg);
+ }
rt2800_register_multiwrite(rt2x00dev, MAC_BSSID_DW0,
conf->bssid, sizeof(conf->bssid));
}
EXPORT_SYMBOL_GPL(rt2800_config_intf);
-void rt2800_config_erp(struct rt2x00_dev *rt2x00dev, struct rt2x00lib_erp *erp)
+void rt2800_config_erp(struct rt2x00_dev *rt2x00dev, struct rt2x00lib_erp *erp,
+ u32 changed)
{
u32 reg;
- rt2800_register_read(rt2x00dev, AUTO_RSP_CFG, ®);
- rt2x00_set_field32(®, AUTO_RSP_CFG_BAC_ACK_POLICY,
- !!erp->short_preamble);
- rt2x00_set_field32(®, AUTO_RSP_CFG_AR_PREAMBLE,
- !!erp->short_preamble);
- rt2800_register_write(rt2x00dev, AUTO_RSP_CFG, reg);
+ if (changed & BSS_CHANGED_ERP_PREAMBLE) {
+ rt2800_register_read(rt2x00dev, AUTO_RSP_CFG, ®);
+ rt2x00_set_field32(®, AUTO_RSP_CFG_BAC_ACK_POLICY,
+ !!erp->short_preamble);
+ rt2x00_set_field32(®, AUTO_RSP_CFG_AR_PREAMBLE,
+ !!erp->short_preamble);
+ rt2800_register_write(rt2x00dev, AUTO_RSP_CFG, reg);
+ }
- rt2800_register_read(rt2x00dev, OFDM_PROT_CFG, ®);
- rt2x00_set_field32(®, OFDM_PROT_CFG_PROTECT_CTRL,
- erp->cts_protection ? 2 : 0);
- rt2800_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
+ if (changed & BSS_CHANGED_ERP_CTS_PROT) {
+ rt2800_register_read(rt2x00dev, OFDM_PROT_CFG, ®);
+ rt2x00_set_field32(®, OFDM_PROT_CFG_PROTECT_CTRL,
+ erp->cts_protection ? 2 : 0);
+ rt2800_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
+ }
- rt2800_register_write(rt2x00dev, LEGACY_BASIC_RATE,
- erp->basic_rates);
- rt2800_register_write(rt2x00dev, HT_BASIC_RATE, 0x00008003);
+ if (changed & BSS_CHANGED_BASIC_RATES) {
+ rt2800_register_write(rt2x00dev, LEGACY_BASIC_RATE,
+ erp->basic_rates);
+ rt2800_register_write(rt2x00dev, HT_BASIC_RATE, 0x00008003);
+ }
- rt2800_register_read(rt2x00dev, BKOFF_SLOT_CFG, ®);
- rt2x00_set_field32(®, BKOFF_SLOT_CFG_SLOT_TIME, erp->slot_time);
- rt2800_register_write(rt2x00dev, BKOFF_SLOT_CFG, reg);
+ if (changed & BSS_CHANGED_ERP_SLOT) {
+ rt2800_register_read(rt2x00dev, BKOFF_SLOT_CFG, ®);
+ rt2x00_set_field32(®, BKOFF_SLOT_CFG_SLOT_TIME,
+ erp->slot_time);
+ rt2800_register_write(rt2x00dev, BKOFF_SLOT_CFG, reg);
- rt2800_register_read(rt2x00dev, XIFS_TIME_CFG, ®);
- rt2x00_set_field32(®, XIFS_TIME_CFG_EIFS, erp->eifs);
- rt2800_register_write(rt2x00dev, XIFS_TIME_CFG, reg);
+ rt2800_register_read(rt2x00dev, XIFS_TIME_CFG, ®);
+ rt2x00_set_field32(®, XIFS_TIME_CFG_EIFS, erp->eifs);
+ rt2800_register_write(rt2x00dev, XIFS_TIME_CFG, reg);
+ }
- rt2800_register_read(rt2x00dev, BCN_TIME_CFG, ®);
- rt2x00_set_field32(®, BCN_TIME_CFG_BEACON_INTERVAL,
- erp->beacon_int * 16);
- rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
+ if (changed & BSS_CHANGED_BEACON_INT) {
+ rt2800_register_read(rt2x00dev, BCN_TIME_CFG, ®);
+ rt2x00_set_field32(®, BCN_TIME_CFG_BEACON_INTERVAL,
+ erp->beacon_int * 16);
+ rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
+ }
}
EXPORT_SYMBOL_GPL(rt2800_config_erp);
rt2x00_set_field32(®, LG_FBK_CFG0_CCKMCS3FBK, 2);
rt2800_register_write(rt2x00dev, LG_FBK_CFG1, reg);
+ /*
+ * Do not force the BA window size, we use the TXWI to set it
+ */
+ rt2800_register_read(rt2x00dev, AMPDU_BA_WINSIZE, ®);
+ rt2x00_set_field32(®, AMPDU_BA_WINSIZE_FORCE_WINSIZE_ENABLE, 0);
+ rt2x00_set_field32(®, AMPDU_BA_WINSIZE_FORCE_WINSIZE, 0);
+ rt2800_register_write(rt2x00dev, AMPDU_BA_WINSIZE, reg);
+
/*
* We must clear the error counters.
* These registers are cleared on read,
/*
* Create channel information array
*/
- info = kzalloc(spec->num_channels * sizeof(*info), GFP_KERNEL);
+ info = kcalloc(spec->num_channels, sizeof(*info), GFP_KERNEL);
if (!info)
return -ENOMEM;