rt2x00: Re-order tx descriptor writing code in drivers.
[pandora-kernel.git] / drivers / net / wireless / rt2x00 / rt2500pci.c
index 408fcfc..8d3e95e 100644 (file)
@@ -440,8 +440,7 @@ static void rt2500pci_config_ant(struct rt2x00_dev *rt2x00dev,
        /*
         * RT2525E and RT5222 need to flip TX I/Q
         */
-       if (rt2x00_rf(&rt2x00dev->chip, RF2525E) ||
-           rt2x00_rf(&rt2x00dev->chip, RF5222)) {
+       if (rt2x00_rf(rt2x00dev, RF2525E) || rt2x00_rf(rt2x00dev, RF5222)) {
                rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
                rt2x00_set_field32(&reg, BBPCSR1_CCK_FLIP, 1);
                rt2x00_set_field32(&reg, BBPCSR1_OFDM_FLIP, 1);
@@ -449,7 +448,7 @@ static void rt2500pci_config_ant(struct rt2x00_dev *rt2x00dev,
                /*
                 * RT2525E does not need RX I/Q Flip.
                 */
-               if (rt2x00_rf(&rt2x00dev->chip, RF2525E))
+               if (rt2x00_rf(rt2x00dev, RF2525E))
                        rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
        } else {
                rt2x00_set_field32(&reg, BBPCSR1_CCK_FLIP, 0);
@@ -475,14 +474,14 @@ static void rt2500pci_config_channel(struct rt2x00_dev *rt2x00dev,
         * Switch on tuning bits.
         * For RT2523 devices we do not need to update the R1 register.
         */
-       if (!rt2x00_rf(&rt2x00dev->chip, RF2523))
+       if (!rt2x00_rf(rt2x00dev, RF2523))
                rt2x00_set_field32(&rf->rf1, RF1_TUNER, 1);
        rt2x00_set_field32(&rf->rf3, RF3_TUNER, 1);
 
        /*
         * For RT2525 we should first set the channel to half band higher.
         */
-       if (rt2x00_rf(&rt2x00dev->chip, RF2525)) {
+       if (rt2x00_rf(rt2x00dev, RF2525)) {
                static const u32 vals[] = {
                        0x00080cbe, 0x00080d02, 0x00080d06, 0x00080d0a,
                        0x00080d0e, 0x00080d12, 0x00080d16, 0x00080d1a,
@@ -516,7 +515,7 @@ static void rt2500pci_config_channel(struct rt2x00_dev *rt2x00dev,
         * Switch off tuning bits.
         * For RT2523 devices we do not need to update the R1 register.
         */
-       if (!rt2x00_rf(&rt2x00dev->chip, RF2523)) {
+       if (!rt2x00_rf(rt2x00dev, RF2523)) {
                rt2x00_set_field32(&rf->rf1, RF1_TUNER, 0);
                rt2500pci_rf_write(rt2x00dev, 1, rf->rf1);
        }
@@ -574,6 +573,10 @@ static void rt2500pci_config_ps(struct rt2x00_dev *rt2x00dev,
 
                rt2x00_set_field32(&reg, CSR20_AUTOWAKE, 1);
                rt2x00pci_register_write(rt2x00dev, CSR20, reg);
+       } else {
+               rt2x00pci_register_read(rt2x00dev, CSR20, &reg);
+               rt2x00_set_field32(&reg, CSR20_AUTOWAKE, 0);
+               rt2x00pci_register_write(rt2x00dev, CSR20, reg);
        }
 
        rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
@@ -640,7 +643,7 @@ static void rt2500pci_link_tuner(struct rt2x00_dev *rt2x00dev,
         * up to version C the link tuning should halt after 20
         * seconds while being associated.
         */
-       if (rt2x00_rev(&rt2x00dev->chip) < RT2560_VERSION_D &&
+       if (rt2x00_rev(rt2x00dev) < RT2560_VERSION_D &&
            rt2x00dev->intf_associated && count > 20)
                return;
 
@@ -650,7 +653,7 @@ static void rt2500pci_link_tuner(struct rt2x00_dev *rt2x00dev,
         * should go straight to dynamic CCA tuning when they
         * are not associated.
         */
-       if (rt2x00_rev(&rt2x00dev->chip) < RT2560_VERSION_D ||
+       if (rt2x00_rev(rt2x00dev) < RT2560_VERSION_D ||
            !rt2x00dev->intf_associated)
                goto dynamic_cca_tune;
 
@@ -1190,6 +1193,11 @@ static void rt2500pci_write_tx_desc(struct rt2x00_dev *rt2x00dev,
                           test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags));
        rt2x00_desc_write(txd, 10, word);
 
+       /*
+        * Writing TXD word 0 must the last to prevent a race condition with
+        * the device, whereby the device may take hold of the TXD before we
+        * finished updating it.
+        */
        rt2x00_desc_read(txd, 0, &word);
        rt2x00_set_field32(&word, TXD_W0_OWNER_NIC, 1);
        rt2x00_set_field32(&word, TXD_W0_VALID, 1);
@@ -1205,7 +1213,7 @@ static void rt2500pci_write_tx_desc(struct rt2x00_dev *rt2x00dev,
        rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs);
        rt2x00_set_field32(&word, TXD_W0_RETRY_MODE,
                           test_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags));
-       rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skb->len);
+       rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, txdesc->length);
        rt2x00_set_field32(&word, TXD_W0_CIPHER_ALG, CIPHER_NONE);
        rt2x00_desc_write(txd, 0, word);
 }
@@ -1213,7 +1221,8 @@ static void rt2500pci_write_tx_desc(struct rt2x00_dev *rt2x00dev,
 /*
  * TX data initialization
  */
-static void rt2500pci_write_beacon(struct queue_entry *entry)
+static void rt2500pci_write_beacon(struct queue_entry *entry,
+                                  struct txentry_desc *txdesc)
 {
        struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
        struct queue_entry_priv_pci *entry_priv = entry->priv_data;
@@ -1243,6 +1252,14 @@ static void rt2500pci_write_beacon(struct queue_entry *entry)
        rt2x00_desc_read(entry_priv->desc, 1, &word);
        rt2x00_set_field32(&word, TXD_W1_BUFFER_ADDRESS, skbdesc->skb_dma);
        rt2x00_desc_write(entry_priv->desc, 1, word);
+
+       /*
+        * Enable beaconing again.
+        */
+       rt2x00_set_field32(&reg, CSR14_TSF_COUNT, 1);
+       rt2x00_set_field32(&reg, CSR14_TBCN, 1);
+       rt2x00_set_field32(&reg, CSR14_BEACON_GEN, 1);
+       rt2x00pci_register_write(rt2x00dev, CSR14, reg);
 }
 
 static void rt2500pci_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
@@ -1250,17 +1267,6 @@ static void rt2500pci_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
 {
        u32 reg;
 
-       if (queue == QID_BEACON) {
-               rt2x00pci_register_read(rt2x00dev, CSR14, &reg);
-               if (!rt2x00_get_field32(reg, CSR14_BEACON_GEN)) {
-                       rt2x00_set_field32(&reg, CSR14_TSF_COUNT, 1);
-                       rt2x00_set_field32(&reg, CSR14_TBCN, 1);
-                       rt2x00_set_field32(&reg, CSR14_BEACON_GEN, 1);
-                       rt2x00pci_register_write(rt2x00dev, CSR14, reg);
-               }
-               return;
-       }
-
        rt2x00pci_register_read(rt2x00dev, TXCSR0, &reg);
        rt2x00_set_field32(&reg, TXCSR0_KICK_PRIO, (queue == QID_AC_BE));
        rt2x00_set_field32(&reg, TXCSR0_KICK_TX, (queue == QID_AC_BK));
@@ -1504,15 +1510,15 @@ static int rt2500pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
         */
        value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
        rt2x00pci_register_read(rt2x00dev, CSR0, &reg);
-       rt2x00_set_chip_rf(rt2x00dev, value, reg);
-       rt2x00_print_chip(rt2x00dev);
-
-       if (!rt2x00_rf(&rt2x00dev->chip, RF2522) &&
-           !rt2x00_rf(&rt2x00dev->chip, RF2523) &&
-           !rt2x00_rf(&rt2x00dev->chip, RF2524) &&
-           !rt2x00_rf(&rt2x00dev->chip, RF2525) &&
-           !rt2x00_rf(&rt2x00dev->chip, RF2525E) &&
-           !rt2x00_rf(&rt2x00dev->chip, RF5222)) {
+       rt2x00_set_chip(rt2x00dev, RT2560, value,
+                       rt2x00_get_field32(reg, CSR0_REVISION));
+
+       if (!rt2x00_rf(rt2x00dev, RF2522) &&
+           !rt2x00_rf(rt2x00dev, RF2523) &&
+           !rt2x00_rf(rt2x00dev, RF2524) &&
+           !rt2x00_rf(rt2x00dev, RF2525) &&
+           !rt2x00_rf(rt2x00dev, RF2525E) &&
+           !rt2x00_rf(rt2x00dev, RF5222)) {
                ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
                return -ENODEV;
        }
@@ -1744,22 +1750,22 @@ static int rt2500pci_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
        spec->supported_bands = SUPPORT_BAND_2GHZ;
        spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
 
-       if (rt2x00_rf(&rt2x00dev->chip, RF2522)) {
+       if (rt2x00_rf(rt2x00dev, RF2522)) {
                spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
                spec->channels = rf_vals_bg_2522;
-       } else if (rt2x00_rf(&rt2x00dev->chip, RF2523)) {
+       } else if (rt2x00_rf(rt2x00dev, RF2523)) {
                spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
                spec->channels = rf_vals_bg_2523;
-       } else if (rt2x00_rf(&rt2x00dev->chip, RF2524)) {
+       } else if (rt2x00_rf(rt2x00dev, RF2524)) {
                spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
                spec->channels = rf_vals_bg_2524;
-       } else if (rt2x00_rf(&rt2x00dev->chip, RF2525)) {
+       } else if (rt2x00_rf(rt2x00dev, RF2525)) {
                spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
                spec->channels = rf_vals_bg_2525;
-       } else if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
+       } else if (rt2x00_rf(rt2x00dev, RF2525E)) {
                spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
                spec->channels = rf_vals_bg_2525e;
-       } else if (rt2x00_rf(&rt2x00dev->chip, RF5222)) {
+       } else if (rt2x00_rf(rt2x00dev, RF5222)) {
                spec->supported_bands |= SUPPORT_BAND_5GHZ;
                spec->num_channels = ARRAY_SIZE(rf_vals_5222);
                spec->channels = rf_vals_5222;
@@ -1860,7 +1866,6 @@ static const struct ieee80211_ops rt2500pci_mac80211_ops = {
        .get_stats              = rt2x00mac_get_stats,
        .bss_info_changed       = rt2x00mac_bss_info_changed,
        .conf_tx                = rt2x00mac_conf_tx,
-       .get_tx_stats           = rt2x00mac_get_tx_stats,
        .get_tsf                = rt2500pci_get_tsf,
        .tx_last_beacon         = rt2500pci_tx_last_beacon,
        .rfkill_poll            = rt2x00mac_rfkill_poll,
@@ -1941,7 +1946,7 @@ static const struct rt2x00_ops rt2500pci_ops = {
 /*
  * RT2500pci module information.
  */
-static struct pci_device_id rt2500pci_device_table[] = {
+static DEFINE_PCI_DEVICE_TABLE(rt2500pci_device_table) = {
        { PCI_DEVICE(0x1814, 0x0201), PCI_DEVICE_DATA(&rt2500pci_ops) },
        { 0, }
 };