rt2x00: Re-order tx descriptor writing code in drivers.

[pandora-kernel.git] / drivers / net / wireless / rt2x00 / rt2400pci.c

diff --git a/drivers/net/wireless/rt2x00/rt2400pci.c b/drivers/net/wireless/rt2x00/rt2400pci.c
index c22b040..1eff6ec 100644 (file)
--- a/drivers/net/wireless/rt2x00/rt2400pci.c
+++ b/drivers/net/wireless/rt2x00/rt2400pci.c
@@ -525,6 +525,10 @@ static void rt2400pci_config_ps(struct rt2x00_dev *rt2x00dev,
 
                rt2x00_set_field32(&reg, CSR20_AUTOWAKE, 1);
                rt2x00pci_register_write(rt2x00dev, CSR20, reg);
+       } else {
+               rt2x00pci_register_read(rt2x00dev, CSR20, &reg);
+               rt2x00_set_field32(&reg, CSR20_AUTOWAKE, 0);
+               rt2x00pci_register_write(rt2x00dev, CSR20, reg);
        }
 
        rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
@@ -1013,8 +1017,8 @@ static void rt2400pci_write_tx_desc(struct rt2x00_dev *rt2x00dev,
        rt2x00_desc_write(entry_priv->desc, 1, word);
 
        rt2x00_desc_read(txd, 2, &word);
-       rt2x00_set_field32(&word, TXD_W2_BUFFER_LENGTH, skb->len);
-       rt2x00_set_field32(&word, TXD_W2_DATABYTE_COUNT, skb->len);
+       rt2x00_set_field32(&word, TXD_W2_BUFFER_LENGTH, txdesc->length);
+       rt2x00_set_field32(&word, TXD_W2_DATABYTE_COUNT, txdesc->length);
        rt2x00_desc_write(txd, 2, word);
 
        rt2x00_desc_read(txd, 3, &word);
@@ -1035,6 +1039,11 @@ static void rt2400pci_write_tx_desc(struct rt2x00_dev *rt2x00dev,
        rt2x00_set_field32(&word, TXD_W3_PLCP_LENGTH_HIGH_BUSY, 1);
        rt2x00_desc_write(txd, 4, word);
 
+       /*
+        * Writing TXD word 0 must the last to prevent a race condition with
+        * the device, whereby the device may take hold of the TXD before we
+        * finished updating it.
+        */
        rt2x00_desc_read(txd, 0, &word);
        rt2x00_set_field32(&word, TXD_W0_OWNER_NIC, 1);
        rt2x00_set_field32(&word, TXD_W0_VALID, 1);
@@ -1055,7 +1064,8 @@ static void rt2400pci_write_tx_desc(struct rt2x00_dev *rt2x00dev,
 /*
  * TX data initialization
  */
-static void rt2400pci_write_beacon(struct queue_entry *entry)
+static void rt2400pci_write_beacon(struct queue_entry *entry,
+                                  struct txentry_desc *txdesc)
 {
        struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
        struct queue_entry_priv_pci *entry_priv = entry->priv_data;
@@ -1085,6 +1095,14 @@ static void rt2400pci_write_beacon(struct queue_entry *entry)
        rt2x00_desc_read(entry_priv->desc, 1, &word);
        rt2x00_set_field32(&word, TXD_W1_BUFFER_ADDRESS, skbdesc->skb_dma);
        rt2x00_desc_write(entry_priv->desc, 1, word);
+
+       /*
+        * Enable beaconing again.
+        */
+       rt2x00_set_field32(&reg, CSR14_TSF_COUNT, 1);
+       rt2x00_set_field32(&reg, CSR14_TBCN, 1);
+       rt2x00_set_field32(&reg, CSR14_BEACON_GEN, 1);
+       rt2x00pci_register_write(rt2x00dev, CSR14, reg);
 }
 
 static void rt2400pci_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
@@ -1092,17 +1110,6 @@ static void rt2400pci_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
 {
        u32 reg;
 
-       if (queue == QID_BEACON) {
-               rt2x00pci_register_read(rt2x00dev, CSR14, &reg);
-               if (!rt2x00_get_field32(reg, CSR14_BEACON_GEN)) {
-                       rt2x00_set_field32(&reg, CSR14_TSF_COUNT, 1);
-                       rt2x00_set_field32(&reg, CSR14_TBCN, 1);
-                       rt2x00_set_field32(&reg, CSR14_BEACON_GEN, 1);
-                       rt2x00pci_register_write(rt2x00dev, CSR14, reg);
-               }
-               return;
-       }
-
        rt2x00pci_register_read(rt2x00dev, TXCSR0, &reg);
        rt2x00_set_field32(&reg, TXCSR0_KICK_PRIO, (queue == QID_AC_BE));
        rt2x00_set_field32(&reg, TXCSR0_KICK_TX, (queue == QID_AC_BK));