Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next
[pandora-kernel.git] / drivers / net / wireless / b43 / phy_n.c
index 05960dd..95c28f5 100644 (file)
@@ -299,7 +299,7 @@ static void b43_nphy_tx_power_ctrl(struct b43_wldev *dev, bool enable)
 static void b43_nphy_tx_power_fix(struct b43_wldev *dev)
 {
        struct b43_phy_n *nphy = dev->phy.n;
-       struct ssb_sprom *sprom = &(dev->sdev->bus->sprom);
+       struct ssb_sprom *sprom = dev->dev->bus_sprom;
 
        u8 txpi[2], bbmult, i;
        u16 tmp, radio_gain, dac_gain;
@@ -423,16 +423,15 @@ static void b43_radio_init2055_pre(struct b43_wldev *dev)
 static void b43_radio_init2055_post(struct b43_wldev *dev)
 {
        struct b43_phy_n *nphy = dev->phy.n;
-       struct ssb_sprom *sprom = &(dev->sdev->bus->sprom);
-       struct ssb_boardinfo *binfo = &(dev->sdev->bus->boardinfo);
+       struct ssb_sprom *sprom = dev->dev->bus_sprom;
        int i;
        u16 val;
        bool workaround = false;
 
        if (sprom->revision < 4)
-               workaround = (binfo->vendor != PCI_VENDOR_ID_BROADCOM &&
-                               binfo->type == 0x46D &&
-                               binfo->rev >= 0x41);
+               workaround = (dev->dev->board_vendor != PCI_VENDOR_ID_BROADCOM
+                             && dev->dev->board_type == 0x46D
+                             && dev->dev->board_rev >= 0x41);
        else
                workaround =
                        !(sprom->boardflags2_lo & B43_BFL2_RXBB_INT_REG_DIS);
@@ -604,17 +603,33 @@ static void b43_nphy_tx_lp_fbw(struct b43_wldev *dev)
 /* http://bcm-v4.sipsolutions.net/802.11/PHY/N/BmacPhyClkFgc */
 static void b43_nphy_bmac_clock_fgc(struct b43_wldev *dev, bool force)
 {
-       u32 tmslow;
+       u32 tmp;
 
        if (dev->phy.type != B43_PHYTYPE_N)
                return;
 
-       tmslow = ssb_read32(dev->sdev, SSB_TMSLOW);
-       if (force)
-               tmslow |= SSB_TMSLOW_FGC;
-       else
-               tmslow &= ~SSB_TMSLOW_FGC;
-       ssb_write32(dev->sdev, SSB_TMSLOW, tmslow);
+       switch (dev->dev->bus_type) {
+#ifdef CONFIG_B43_BCMA
+       case B43_BUS_BCMA:
+               tmp = bcma_read32(dev->dev->bdev, BCMA_IOCTL);
+               if (force)
+                       tmp |= BCMA_IOCTL_FGC;
+               else
+                       tmp &= ~BCMA_IOCTL_FGC;
+               bcma_write32(dev->dev->bdev, BCMA_IOCTL, tmp);
+               break;
+#endif
+#ifdef CONFIG_B43_SSB
+       case B43_BUS_SSB:
+               tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW);
+               if (force)
+                       tmp |= SSB_TMSLOW_FGC;
+               else
+                       tmp &= ~SSB_TMSLOW_FGC;
+               ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp);
+               break;
+#endif
+       }
 }
 
 /* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CCA */
@@ -959,8 +974,21 @@ static void b43_nphy_superswitch_init(struct b43_wldev *dev, bool init)
                b43_phy_write(dev, B43_NPHY_GPIO_LOOEN, 0);
                b43_phy_write(dev, B43_NPHY_GPIO_HIOEN, 0);
 
-               ssb_chipco_gpio_control(&dev->sdev->bus->chipco, 0xFC00,
-                                       0xFC00);
+               switch (dev->dev->bus_type) {
+#ifdef CONFIG_B43_BCMA
+               case B43_BUS_BCMA:
+                       bcma_chipco_gpio_control(&dev->dev->bdev->bus->drv_cc,
+                                                0xFC00, 0xFC00);
+                       break;
+#endif
+#ifdef CONFIG_B43_SSB
+               case B43_BUS_SSB:
+                       ssb_chipco_gpio_control(&dev->dev->sdev->bus->chipco,
+                                               0xFC00, 0xFC00);
+                       break;
+#endif
+               }
+
                b43_write32(dev, B43_MMIO_MACCTL,
                        b43_read32(dev, B43_MMIO_MACCTL) &
                        ~B43_MACCTL_GPOUTSMSK);
@@ -983,7 +1011,7 @@ static u16 b43_nphy_classifier(struct b43_wldev *dev, u16 mask, u16 val)
 {
        u16 tmp;
 
-       if (dev->sdev->id.revision == 16)
+       if (dev->dev->core_rev == 16)
                b43_mac_suspend(dev);
 
        tmp = b43_phy_read(dev, B43_NPHY_CLASSCTL);
@@ -993,7 +1021,7 @@ static u16 b43_nphy_classifier(struct b43_wldev *dev, u16 mask, u16 val)
        tmp |= (val & mask);
        b43_phy_maskset(dev, B43_NPHY_CLASSCTL, 0xFFF8, tmp);
 
-       if (dev->sdev->id.revision == 16)
+       if (dev->dev->core_rev == 16)
                b43_mac_enable(dev);
 
        return tmp;
@@ -1168,7 +1196,7 @@ static void b43_nphy_adjust_lna_gain_table(struct b43_wldev *dev)
 static void b43_nphy_gain_ctrl_workarounds(struct b43_wldev *dev)
 {
        struct b43_phy_n *nphy = dev->phy.n;
-       struct ssb_sprom *sprom = &(dev->sdev->bus->sprom);
+       struct ssb_sprom *sprom = dev->dev->bus_sprom;
 
        /* PHY rev 0, 1, 2 */
        u8 i, j;
@@ -1373,7 +1401,7 @@ static void b43_nphy_gain_ctrl_workarounds(struct b43_wldev *dev)
 /* http://bcm-v4.sipsolutions.net/802.11/PHY/N/Workarounds */
 static void b43_nphy_workarounds(struct b43_wldev *dev)
 {
-       struct ssb_bus *bus = dev->sdev->bus;
+       struct ssb_sprom *sprom = dev->dev->bus_sprom;
        struct b43_phy *phy = &dev->phy;
        struct b43_phy_n *nphy = phy->n;
 
@@ -1443,9 +1471,9 @@ static void b43_nphy_workarounds(struct b43_wldev *dev)
 
                /* N PHY WAR TX Chain Update with hw_phytxchain as argument */
 
-               if ((bus->sprom.boardflags2_lo & B43_BFL2_APLL_WAR &&
+               if ((sprom->boardflags2_lo & B43_BFL2_APLL_WAR &&
                    b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) ||
-                   (bus->sprom.boardflags2_lo & B43_BFL2_GPLL_WAR &&
+                   (sprom->boardflags2_lo & B43_BFL2_GPLL_WAR &&
                    b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ))
                        tmp32 = 0x00088888;
                else
@@ -1503,8 +1531,8 @@ static void b43_nphy_workarounds(struct b43_wldev *dev)
                b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO2, 0x2D8);
                b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP2, 0x301);
 
-               if (bus->sprom.boardflags2_lo & 0x100 &&
-                   bus->boardinfo.type == 0x8B) {
+               if (sprom->boardflags2_lo & 0x100 &&
+                   dev->dev->board_type == 0x8B) {
                        delays1[0] = 0x1;
                        delays1[5] = 0x14;
                }
@@ -3586,7 +3614,7 @@ static void b43_nphy_set_rx_core_state(struct b43_wldev *dev, u8 mask)
  */
 int b43_phy_initn(struct b43_wldev *dev)
 {
-       struct ssb_bus *bus = dev->sdev->bus;
+       struct ssb_sprom *sprom = dev->dev->bus_sprom;
        struct b43_phy *phy = &dev->phy;
        struct b43_phy_n *nphy = phy->n;
        u8 tx_pwr_state;
@@ -3599,9 +3627,22 @@ int b43_phy_initn(struct b43_wldev *dev)
        bool do_cal = false;
 
        if ((dev->phy.rev >= 3) &&
-          (bus->sprom.boardflags_lo & B43_BFL_EXTLNA) &&
+          (sprom->boardflags_lo & B43_BFL_EXTLNA) &&
           (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)) {
-               chipco_set32(&dev->sdev->bus->chipco, SSB_CHIPCO_CHIPCTL, 0x40);
+               switch (dev->dev->bus_type) {
+#ifdef CONFIG_B43_BCMA
+               case B43_BUS_BCMA:
+                       bcma_cc_set32(&dev->dev->bdev->bus->drv_cc,
+                                     BCMA_CC_CHIPCTL, 0x40);
+                       break;
+#endif
+#ifdef CONFIG_B43_SSB
+               case B43_BUS_SSB:
+                       chipco_set32(&dev->dev->sdev->bus->chipco,
+                                    SSB_CHIPCO_CHIPCTL, 0x40);
+                       break;
+#endif
+               }
        }
        nphy->deaf_count = 0;
        b43_nphy_tables_init(dev);
@@ -3639,9 +3680,9 @@ int b43_phy_initn(struct b43_wldev *dev)
        b43_phy_write(dev, B43_NPHY_AFESEQ_TX2RX_PUD_20M, 0x20);
        b43_phy_write(dev, B43_NPHY_AFESEQ_TX2RX_PUD_40M, 0x20);
 
-       if (bus->sprom.boardflags2_lo & 0x100 ||
-           (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
-            bus->boardinfo.type == 0x8B))
+       if (sprom->boardflags2_lo & 0x100 ||
+           (dev->dev->board_vendor == PCI_VENDOR_ID_APPLE &&
+            dev->dev->board_type == 0x8B))
                b43_phy_write(dev, B43_NPHY_TXREALFD, 0xA0);
        else
                b43_phy_write(dev, B43_NPHY_TXREALFD, 0xB8);
@@ -4026,11 +4067,24 @@ static void b43_nphy_op_software_rfkill(struct b43_wldev *dev,
 /* http://bcm-v4.sipsolutions.net/802.11/PHY/Anacore */
 static void b43_nphy_op_switch_analog(struct b43_wldev *dev, bool on)
 {
-       u16 val = on ? 0 : 0x7FFF;
+       u16 override = on ? 0x0 : 0x7FFF;
+       u16 core = on ? 0xD : 0x00FD;
 
-       if (dev->phy.rev >= 3)
-               b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, val);
-       b43_phy_write(dev, B43_NPHY_AFECTL_OVER, val);
+       if (dev->phy.rev >= 3) {
+               if (on) {
+                       b43_phy_write(dev, B43_NPHY_AFECTL_C1, core);
+                       b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, override);
+                       b43_phy_write(dev, B43_NPHY_AFECTL_C2, core);
+                       b43_phy_write(dev, B43_NPHY_AFECTL_OVER, override);
+               } else {
+                       b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, override);
+                       b43_phy_write(dev, B43_NPHY_AFECTL_C1, core);
+                       b43_phy_write(dev, B43_NPHY_AFECTL_OVER, override);
+                       b43_phy_write(dev, B43_NPHY_AFECTL_C2, core);
+               }
+       } else {
+               b43_phy_write(dev, B43_NPHY_AFECTL_OVER, override);
+       }
 }
 
 static int b43_nphy_op_switch_channel(struct b43_wldev *dev,