{
u32 low, high;
- B43_WARN_ON(dev->dev->id.revision < 3);
+ B43_WARN_ON(dev->sdev->id.revision < 3);
/* The hardware guarantees us an atomic read, if we
* read the low register first. */
{
u32 low, high;
- B43_WARN_ON(dev->dev->id.revision < 3);
+ B43_WARN_ON(dev->sdev->id.revision < 3);
low = tsf;
high = (tsf >> 32);
b43_ram_write(dev, i * 4, buffer[i]);
b43_write16(dev, 0x0568, 0x0000);
- if (dev->dev->id.revision < 11)
+ if (dev->sdev->id.revision < 11)
b43_write16(dev, 0x07C0, 0x0000);
else
b43_write16(dev, 0x07C0, 0x0100);
b43_write32(dev, B43_MMIO_MACCTL, macctl);
/* Commit write */
b43_read32(dev, B43_MMIO_MACCTL);
- if (awake && dev->dev->id.revision >= 5) {
+ if (awake && dev->sdev->id.revision >= 5) {
/* Wait for the microcode to wake up. */
for (i = 0; i < 100; i++) {
ucstat = b43_shm_read16(dev, B43_SHM_SHARED,
}
}
-void b43_wireless_core_reset(struct b43_wldev *dev, u32 flags)
+static void b43_ssb_wireless_core_reset(struct b43_wldev *dev, u32 flags)
{
u32 tmslow;
- u32 macctl;
flags |= B43_TMSLOW_PHYCLKEN;
flags |= B43_TMSLOW_PHYRESET;
if (dev->phy.type == B43_PHYTYPE_N)
flags |= B43_TMSLOW_PHY_BANDWIDTH_20MHZ; /* Make 20 MHz def */
- ssb_device_enable(dev->dev, flags);
+ ssb_device_enable(dev->sdev, flags);
msleep(2); /* Wait for the PLL to turn on. */
/* Now take the PHY out of Reset again */
- tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
+ tmslow = ssb_read32(dev->sdev, SSB_TMSLOW);
tmslow |= SSB_TMSLOW_FGC;
tmslow &= ~B43_TMSLOW_PHYRESET;
- ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
- ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
+ ssb_write32(dev->sdev, SSB_TMSLOW, tmslow);
+ ssb_read32(dev->sdev, SSB_TMSLOW); /* flush */
msleep(1);
tmslow &= ~SSB_TMSLOW_FGC;
- ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
- ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
+ ssb_write32(dev->sdev, SSB_TMSLOW, tmslow);
+ ssb_read32(dev->sdev, SSB_TMSLOW); /* flush */
msleep(1);
+}
+
+void b43_wireless_core_reset(struct b43_wldev *dev, u32 flags)
+{
+ u32 macctl;
+
+ b43_ssb_wireless_core_reset(dev, flags);
/* Turn Analog ON, but only if we already know the PHY-type.
* This protects against very early setup where we don't know the
{
u32 dummy;
- if (dev->dev->id.revision < 5)
+ if (dev->sdev->id.revision < 5)
return;
/* Read all entries from the microcode TXstatus FIFO
* and throw them away.
/* Get the mask of available antennas. */
if (dev->phy.gmode)
- antenna_mask = dev->dev->bus->sprom.ant_available_bg;
+ antenna_mask = dev->sdev->bus->sprom.ant_available_bg;
else
- antenna_mask = dev->dev->bus->sprom.ant_available_a;
+ antenna_mask = dev->sdev->bus->sprom.ant_available_a;
if (!(antenna_mask & (1 << (antenna_nr - 1)))) {
/* This antenna is not available. Fall back to default. */
mutex_lock(&wl->mutex);
dev = wl->current_dev;
if (likely(dev && (b43_status(dev) >= B43_STAT_INITIALIZED))) {
- if (dev->dev->bus->bustype == SSB_BUSTYPE_SDIO) {
+ if (dev->sdev->bus->bustype == SSB_BUSTYPE_SDIO) {
/* wl->mutex is enough. */
b43_do_beacon_update_trigger_work(dev);
mmiowb();
static void b43_set_beacon_int(struct b43_wldev *dev, u16 beacon_int)
{
b43_time_lock(dev);
- if (dev->dev->id.revision >= 3) {
+ if (dev->sdev->id.revision >= 3) {
b43_write32(dev, B43_MMIO_TSF_CFP_REP, (beacon_int << 16));
b43_write32(dev, B43_MMIO_TSF_CFP_START, (beacon_int << 10));
} else {
B43_WARN_ON(1);
return -ENOSYS;
}
- err = request_firmware(&blob, ctx->fwname, ctx->dev->dev->dev);
+ err = request_firmware(&blob, ctx->fwname, ctx->dev->sdev->dev);
if (err == -ENOENT) {
snprintf(ctx->errors[ctx->req_type],
sizeof(ctx->errors[ctx->req_type]),
{
struct b43_wldev *dev = ctx->dev;
struct b43_firmware *fw = &ctx->dev->fw;
- const u8 rev = ctx->dev->dev->id.revision;
+ const u8 rev = ctx->dev->sdev->id.revision;
const char *filename;
u32 tmshigh;
int err;
/* Get microcode */
- tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
if ((rev >= 5) && (rev <= 10))
filename = "ucode5";
else if ((rev >= 11) && (rev <= 12))
switch (dev->phy.type) {
case B43_PHYTYPE_A:
if ((rev >= 5) && (rev <= 10)) {
+ tmshigh = ssb_read32(dev->sdev, SSB_TMSHIGH);
if (tmshigh & B43_TMSHIGH_HAVE_2GHZ_PHY)
filename = "a0g1initvals5";
else
switch (dev->phy.type) {
case B43_PHYTYPE_A:
if ((rev >= 5) && (rev <= 10)) {
+ tmshigh = ssb_read32(dev->sdev, SSB_TMSHIGH);
if (tmshigh & B43_TMSHIGH_HAVE_2GHZ_PHY)
filename = "a0g1bsinitvals5";
else
snprintf(wiphy->fw_version, sizeof(wiphy->fw_version), "%u.%u",
dev->fw.rev, dev->fw.patch);
- wiphy->hw_version = dev->dev->id.coreid;
+ wiphy->hw_version = dev->sdev->id.coreid;
if (b43_is_old_txhdr_format(dev)) {
/* We're over the deadline, but we keep support for old fw
/* Initialize the GPIOs
* http://bcm-specs.sipsolutions.net/GPIO
*/
+static struct ssb_device *b43_ssb_gpio_dev(struct b43_wldev *dev)
+{
+ struct ssb_bus *bus = dev->sdev->bus;
+
+#ifdef CONFIG_SSB_DRIVER_PCICORE
+ return (bus->chipco.dev ? bus->chipco.dev : bus->pcicore.dev);
+#else
+ return bus->chipco.dev;
+#endif
+}
+
static int b43_gpio_init(struct b43_wldev *dev)
{
- struct ssb_bus *bus = dev->dev->bus;
- struct ssb_device *gpiodev, *pcidev = NULL;
+ struct ssb_device *gpiodev;
u32 mask, set;
b43_write32(dev, B43_MMIO_MACCTL, b43_read32(dev, B43_MMIO_MACCTL)
mask = 0x0000001F;
set = 0x0000000F;
- if (dev->dev->bus->chip_id == 0x4301) {
+ if (dev->sdev->bus->chip_id == 0x4301) {
mask |= 0x0060;
set |= 0x0060;
}
mask |= 0x0180;
set |= 0x0180;
}
- if (dev->dev->bus->sprom.boardflags_lo & B43_BFL_PACTRL) {
+ if (dev->sdev->bus->sprom.boardflags_lo & B43_BFL_PACTRL) {
b43_write16(dev, B43_MMIO_GPIO_MASK,
b43_read16(dev, B43_MMIO_GPIO_MASK)
| 0x0200);
mask |= 0x0200;
set |= 0x0200;
}
- if (dev->dev->id.revision >= 2)
+ if (dev->sdev->id.revision >= 2)
mask |= 0x0010; /* FIXME: This is redundant. */
-#ifdef CONFIG_SSB_DRIVER_PCICORE
- pcidev = bus->pcicore.dev;
-#endif
- gpiodev = bus->chipco.dev ? : pcidev;
- if (!gpiodev)
- return 0;
- ssb_write32(gpiodev, B43_GPIO_CONTROL,
- (ssb_read32(gpiodev, B43_GPIO_CONTROL)
- & mask) | set);
+ gpiodev = b43_ssb_gpio_dev(dev);
+ if (gpiodev)
+ ssb_write32(gpiodev, B43_GPIO_CONTROL,
+ (ssb_read32(gpiodev, B43_GPIO_CONTROL)
+ & mask) | set);
return 0;
}
/* Turn off all GPIO stuff. Call this on module unload, for example. */
static void b43_gpio_cleanup(struct b43_wldev *dev)
{
- struct ssb_bus *bus = dev->dev->bus;
- struct ssb_device *gpiodev, *pcidev = NULL;
+ struct ssb_device *gpiodev;
-#ifdef CONFIG_SSB_DRIVER_PCICORE
- pcidev = bus->pcicore.dev;
-#endif
- gpiodev = bus->chipco.dev ? : pcidev;
- if (!gpiodev)
- return;
- ssb_write32(gpiodev, B43_GPIO_CONTROL, 0);
+ gpiodev = b43_ssb_gpio_dev(dev);
+ if (gpiodev)
+ ssb_write32(gpiodev, B43_GPIO_CONTROL, 0);
}
/* http://bcm-specs.sipsolutions.net/EnableMac */
/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/MacPhyClkSet */
void b43_mac_phy_clock_set(struct b43_wldev *dev, bool on)
{
- u32 tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
+ u32 tmslow = ssb_read32(dev->sdev, SSB_TMSLOW);
if (on)
tmslow |= B43_TMSLOW_MACPHYCLKEN;
else
tmslow &= ~B43_TMSLOW_MACPHYCLKEN;
- ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
+ ssb_write32(dev->sdev, SSB_TMSLOW, tmslow);
}
static void b43_adjust_opmode(struct b43_wldev *dev)
/* Workaround: On old hardware the HW-MAC-address-filter
* doesn't work properly, so always run promisc in filter
* it in software. */
- if (dev->dev->id.revision <= 4)
+ if (dev->sdev->id.revision <= 4)
ctl |= B43_MACCTL_PROMISC;
b43_write32(dev, B43_MMIO_MACCTL, ctl);
cfp_pretbtt = 2;
if ((ctl & B43_MACCTL_INFRA) && !(ctl & B43_MACCTL_AP)) {
- if (dev->dev->bus->chip_id == 0x4306 &&
- dev->dev->bus->chip_rev == 3)
+ if (dev->sdev->bus->chip_id == 0x4306 &&
+ dev->sdev->bus->chip_rev == 3)
cfp_pretbtt = 100;
else
cfp_pretbtt = 50;
b43_write16(dev, 0x005E, value16);
}
b43_write32(dev, 0x0100, 0x01000000);
- if (dev->dev->id.revision < 5)
+ if (dev->sdev->id.revision < 5)
b43_write32(dev, 0x010C, 0x01000000);
b43_write32(dev, B43_MMIO_MACCTL, b43_read32(dev, B43_MMIO_MACCTL)
/* Initially set the wireless operation mode. */
b43_adjust_opmode(dev);
- if (dev->dev->id.revision < 3) {
+ if (dev->sdev->id.revision < 3) {
b43_write16(dev, 0x060E, 0x0000);
b43_write16(dev, 0x0610, 0x8000);
b43_write16(dev, 0x0604, 0x0000);
b43_mac_phy_clock_set(dev, true);
b43_write16(dev, B43_MMIO_POWERUP_DELAY,
- dev->dev->bus->chipco.fast_pwrup_delay);
+ dev->sdev->bus->chipco.fast_pwrup_delay);
err = 0;
b43dbg(dev->wl, "Chip initialized\n");
b43_shm_write32(dev, B43_SHM_SHARED, 0, backup0);
b43_shm_write32(dev, B43_SHM_SHARED, 4, backup4);
- if ((dev->dev->id.revision >= 3) && (dev->dev->id.revision <= 10)) {
+ if ((dev->sdev->id.revision >= 3) && (dev->sdev->id.revision <= 10)) {
/* The 32bit register shadows the two 16bit registers
* with update sideeffects. Validate this. */
b43_write16(dev, B43_MMIO_TSF_CFP_START, 0xAAAA);
static void b43_put_phy_into_reset(struct b43_wldev *dev)
{
- struct ssb_device *sdev = dev->dev;
+ struct ssb_device *sdev = dev->sdev;
u32 tmslow;
tmslow = ssb_read32(sdev, SSB_TMSLOW);
/* Disable interrupts on the device. */
b43_set_status(dev, B43_STAT_INITIALIZED);
- if (dev->dev->bus->bustype == SSB_BUSTYPE_SDIO) {
+ if (dev->sdev->bus->bustype == SSB_BUSTYPE_SDIO) {
/* wl->mutex is locked. That is enough. */
b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, 0);
b43_read32(dev, B43_MMIO_GEN_IRQ_MASK); /* Flush */
/* Synchronize and free the interrupt handlers. Unlock to avoid deadlocks. */
orig_dev = dev;
mutex_unlock(&wl->mutex);
- if (dev->dev->bus->bustype == SSB_BUSTYPE_SDIO) {
+ if (dev->sdev->bus->bustype == SSB_BUSTYPE_SDIO) {
b43_sdio_free_irq(dev);
} else {
- synchronize_irq(dev->dev->irq);
- free_irq(dev->dev->irq, dev);
+ synchronize_irq(dev->sdev->irq);
+ free_irq(dev->sdev->irq, dev);
}
mutex_lock(&wl->mutex);
dev = wl->current_dev;
B43_WARN_ON(b43_status(dev) != B43_STAT_INITIALIZED);
drain_txstatus_queue(dev);
- if (dev->dev->bus->bustype == SSB_BUSTYPE_SDIO) {
+ if (dev->sdev->bus->bustype == SSB_BUSTYPE_SDIO) {
err = b43_sdio_request_irq(dev, b43_sdio_interrupt_handler);
if (err) {
b43err(dev->wl, "Cannot request SDIO IRQ\n");
goto out;
}
} else {
- err = request_threaded_irq(dev->dev->irq, b43_interrupt_handler,
+ err = request_threaded_irq(dev->sdev->irq, b43_interrupt_handler,
b43_interrupt_thread_handler,
IRQF_SHARED, KBUILD_MODNAME, dev);
if (err) {
- b43err(dev->wl, "Cannot request IRQ-%d\n", dev->dev->irq);
+ b43err(dev->wl, "Cannot request IRQ-%d\n",
+ dev->sdev->irq);
goto out;
}
}
analog_type, phy_type, phy_rev);
/* Get RADIO versioning */
- if (dev->dev->bus->chip_id == 0x4317) {
- if (dev->dev->bus->chip_rev == 0)
+ if (dev->sdev->bus->chip_id == 0x4317) {
+ if (dev->sdev->bus->chip_rev == 0)
tmp = 0x3205017F;
- else if (dev->dev->bus->chip_rev == 1)
+ else if (dev->sdev->bus->chip_rev == 1)
tmp = 0x4205017F;
else
tmp = 0x5205017F;
static void b43_bluetooth_coext_enable(struct b43_wldev *dev)
{
- struct ssb_sprom *sprom = &dev->dev->bus->sprom;
+ struct ssb_sprom *sprom = &dev->sdev->bus->sprom;
u64 hf;
if (!modparam_btcoex)
static void b43_imcfglo_timeouts_workaround(struct b43_wldev *dev)
{
- struct ssb_bus *bus = dev->dev->bus;
+ struct ssb_bus *bus = dev->sdev->bus;
u32 tmp;
if ((bus->chip_id == 0x4311 && bus->chip_rev == 2) ||
(bus->chip_id == 0x4312)) {
- tmp = ssb_read32(dev->dev, SSB_IMCFGLO);
+ tmp = ssb_read32(dev->sdev, SSB_IMCFGLO);
tmp &= ~SSB_IMCFGLO_REQTO;
tmp &= ~SSB_IMCFGLO_SERTO;
tmp |= 0x3;
- ssb_write32(dev->dev, SSB_IMCFGLO, tmp);
+ ssb_write32(dev->sdev, SSB_IMCFGLO, tmp);
ssb_commit_settings(bus);
}
}
dev->wl->current_beacon = NULL;
}
- ssb_device_disable(dev->dev, 0);
- ssb_bus_may_powerdown(dev->dev->bus);
+ ssb_device_disable(dev->sdev, 0);
+ ssb_bus_may_powerdown(dev->sdev->bus);
}
/* Initialize a wireless core */
static int b43_wireless_core_init(struct b43_wldev *dev)
{
- struct ssb_bus *bus = dev->dev->bus;
+ struct ssb_bus *bus = dev->sdev->bus;
struct ssb_sprom *sprom = &bus->sprom;
struct b43_phy *phy = &dev->phy;
int err;
err = ssb_bus_powerup(bus, 0);
if (err)
goto out;
- if (!ssb_device_is_enabled(dev->dev)) {
+ if (!ssb_device_is_enabled(dev->sdev)) {
tmp = phy->gmode ? B43_TMSLOW_GMODE : 0;
b43_wireless_core_reset(dev, tmp);
}
phy->ops->prepare_structs(dev);
/* Enable IRQ routing to this device. */
- ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev);
+ ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->sdev);
b43_imcfglo_timeouts_workaround(dev);
b43_bluetooth_coext_disable(dev);
if (err)
goto err_busdown;
b43_shm_write16(dev, B43_SHM_SHARED,
- B43_SHM_SH_WLCOREREV, dev->dev->id.revision);
+ B43_SHM_SH_WLCOREREV, dev->sdev->id.revision);
hf = b43_hf_read(dev);
if (phy->type == B43_PHYTYPE_G) {
hf |= B43_HF_SYMW;
/* Maximum Contention Window */
b43_shm_write16(dev, B43_SHM_SCRATCH, B43_SHM_SC_MAXCONT, 0x3FF);
- if ((dev->dev->bus->bustype == SSB_BUSTYPE_PCMCIA) ||
- (dev->dev->bus->bustype == SSB_BUSTYPE_SDIO) ||
+ if ((dev->sdev->bus->bustype == SSB_BUSTYPE_PCMCIA) ||
+ (dev->sdev->bus->bustype == SSB_BUSTYPE_SDIO) ||
dev->use_pio) {
dev->__using_pio_transfers = 1;
err = b43_pio_init(dev);
static int b43_wireless_core_attach(struct b43_wldev *dev)
{
struct b43_wl *wl = dev->wl;
- struct ssb_bus *bus = dev->dev->bus;
+ struct ssb_bus *bus = dev->sdev->bus;
struct pci_dev *pdev = (bus->bustype == SSB_BUSTYPE_PCI) ? bus->host_pci : NULL;
int err;
bool have_2ghz_phy = 0, have_5ghz_phy = 0;
goto out;
}
/* Get the PHY type. */
- if (dev->dev->id.revision >= 5) {
+ if (dev->sdev->id.revision >= 5) {
u32 tmshigh;
- tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
+ tmshigh = ssb_read32(dev->sdev, SSB_TMSHIGH);
have_2ghz_phy = !!(tmshigh & B43_TMSHIGH_HAVE_2GHZ_PHY);
have_5ghz_phy = !!(tmshigh & B43_TMSHIGH_HAVE_5GHZ_PHY);
} else
INIT_WORK(&dev->restart_work, b43_chip_reset);
dev->phy.ops->switch_analog(dev, 0);
- ssb_device_disable(dev->dev, 0);
+ ssb_device_disable(dev->sdev, 0);
ssb_bus_may_powerdown(bus);
out:
goto out;
wldev->use_pio = b43_modparam_pio;
- wldev->dev = dev;
+ wldev->sdev = dev;
wldev->wl = wl;
b43_set_status(wldev, B43_STAT_UNINIT);
wldev->bad_frames_preempt = modparam_bad_frames_preempt;
ieee80211_free_hw(hw);
}
-static int b43_wireless_init(struct ssb_device *dev)
+static struct b43_wl *b43_wireless_init(struct ssb_device *dev)
{
struct ssb_sprom *sprom = &dev->bus->sprom;
struct ieee80211_hw *hw;
struct b43_wl *wl;
- int err = -ENOMEM;
-
- b43_sprom_fixup(dev->bus);
hw = ieee80211_alloc_hw(sizeof(*wl), &b43_hw_ops);
if (!hw) {
b43err(NULL, "Could not allocate ieee80211 device\n");
- goto out;
+ return ERR_PTR(-ENOMEM);
}
wl = hw_to_b43_wl(hw);
INIT_WORK(&wl->tx_work, b43_tx_work);
skb_queue_head_init(&wl->tx_queue);
- ssb_set_devtypedata(dev, wl);
b43info(wl, "Broadcom %04X WLAN found (core revision %u)\n",
dev->bus->chip_id, dev->id.revision);
- err = 0;
-out:
- return err;
+ return wl;
}
static int b43_ssb_probe(struct ssb_device *dev, const struct ssb_device_id *id)
if (!wl) {
/* Probing the first core. Must setup common struct b43_wl */
first = 1;
- err = b43_wireless_init(dev);
- if (err)
+ b43_sprom_fixup(dev->bus);
+ wl = b43_wireless_init(dev);
+ if (IS_ERR(wl)) {
+ err = PTR_ERR(wl);
goto out;
- wl = ssb_get_devtypedata(dev);
- B43_WARN_ON(!wl);
+ }
+ ssb_set_devtypedata(dev, wl);
+ B43_WARN_ON(ssb_get_devtypedata(dev) != wl);
}
err = b43_one_core_attach(dev, wl);
if (err)
git.openpandora.org / pandora-kernel.git / blobdiff