ath9k_hw: Configure pll control register accordingly for AR9340

[pandora-kernel.git] / drivers / net / wireless / ath / ath9k / phy.h

diff --git a/drivers/net/wireless/ath/ath9k/phy.h b/drivers/net/wireless/ath/ath9k/phy.h
index 8e5fe9d..9441bf8 100644 (file)
--- a/drivers/net/wireless/ath/ath9k/phy.h
+++ b/drivers/net/wireless/ath/ath9k/phy.h
@@ -45,4 +45,7 @@
 #define        AR_PHY_TIMING11_SPUR_FREQ_SD            0x3FF00000
 #define        AR_PHY_TIMING11_SPUR_FREQ_SD_S          20
 
+#define AR_PHY_PLL_CONTROL 0x16180
+#define AR_PHY_PLL_MODE 0x16184
+
 #endif