Merge branch 'devicetree/next' of git://git.secretlab.ca/git/linux-2.6

[pandora-kernel.git] / drivers / net / vxge / vxge-config.h

diff --git a/drivers/net/vxge/vxge-config.h b/drivers/net/vxge/vxge-config.h
index 3c53aa7..dd36258 100644 (file)
--- a/drivers/net/vxge/vxge-config.h
+++ b/drivers/net/vxge/vxge-config.h
@@ -13,8 +13,10 @@
  ******************************************************************************/
 #ifndef VXGE_CONFIG_H
 #define VXGE_CONFIG_H
+#include <linux/hardirq.h>
 #include <linux/list.h>
 #include <linux/slab.h>
+#include <asm/io.h>
 
 #ifndef VXGE_CACHE_LINE_SIZE
 #define VXGE_CACHE_LINE_SIZE 128
@@ -412,44 +414,48 @@ struct vxge_hw_vp_config {
  * See also: struct vxge_hw_tim_intr_config{}.
  */
 struct vxge_hw_device_config {
-       u32                             dma_blockpool_initial;
-       u32                             dma_blockpool_max;
-#define VXGE_HW_MIN_DMA_BLOCK_POOL_SIZE                        0
-#define VXGE_HW_INITIAL_DMA_BLOCK_POOL_SIZE            0
-#define VXGE_HW_INCR_DMA_BLOCK_POOL_SIZE               4
-#define VXGE_HW_MAX_DMA_BLOCK_POOL_SIZE                        4096
-
-#define        VXGE_HW_MAX_PAYLOAD_SIZE_512            2
-
-       u32                             intr_mode;
-#define VXGE_HW_INTR_MODE_IRQLINE                      0
-#define VXGE_HW_INTR_MODE_MSIX                         1
-#define VXGE_HW_INTR_MODE_MSIX_ONE_SHOT                        2
-
-#define VXGE_HW_INTR_MODE_DEF                          0
-
-       u32                             rth_en;
-#define VXGE_HW_RTH_DISABLE                            0
-#define VXGE_HW_RTH_ENABLE                             1
-#define VXGE_HW_RTH_DEFAULT                            0
-
-       u32                             rth_it_type;
-#define VXGE_HW_RTH_IT_TYPE_SOLO_IT                    0
-#define VXGE_HW_RTH_IT_TYPE_MULTI_IT                   1
-#define VXGE_HW_RTH_IT_TYPE_DEFAULT                    0
-
-       u32                             rts_mac_en;
+       u32                                     device_poll_millis;
+#define VXGE_HW_MIN_DEVICE_POLL_MILLIS         1
+#define VXGE_HW_MAX_DEVICE_POLL_MILLIS         100000
+#define VXGE_HW_DEF_DEVICE_POLL_MILLIS         1000
+
+       u32                                     dma_blockpool_initial;
+       u32                                     dma_blockpool_max;
+#define VXGE_HW_MIN_DMA_BLOCK_POOL_SIZE                0
+#define VXGE_HW_INITIAL_DMA_BLOCK_POOL_SIZE    0
+#define VXGE_HW_INCR_DMA_BLOCK_POOL_SIZE       4
+#define VXGE_HW_MAX_DMA_BLOCK_POOL_SIZE                4096
+
+#define        VXGE_HW_MAX_PAYLOAD_SIZE_512            2
+
+       u32                                     intr_mode:2,
+#define VXGE_HW_INTR_MODE_IRQLINE              0
+#define VXGE_HW_INTR_MODE_MSIX                 1
+#define VXGE_HW_INTR_MODE_MSIX_ONE_SHOT                2
+
+#define VXGE_HW_INTR_MODE_DEF                  0
+
+                                               rth_en:1,
+#define VXGE_HW_RTH_DISABLE                    0
+#define VXGE_HW_RTH_ENABLE                     1
+#define VXGE_HW_RTH_DEFAULT                    0
+
+                                               rth_it_type:1,
+#define VXGE_HW_RTH_IT_TYPE_SOLO_IT            0
+#define VXGE_HW_RTH_IT_TYPE_MULTI_IT           1
+#define VXGE_HW_RTH_IT_TYPE_DEFAULT            0
+
+                                               rts_mac_en:1,
 #define VXGE_HW_RTS_MAC_DISABLE                        0
 #define VXGE_HW_RTS_MAC_ENABLE                 1
 #define VXGE_HW_RTS_MAC_DEFAULT                        0
 
-       struct vxge_hw_vp_config        vp_config[VXGE_HW_MAX_VIRTUAL_PATHS];
-
-       u32                             device_poll_millis;
-#define VXGE_HW_MIN_DEVICE_POLL_MILLIS                 1
-#define VXGE_HW_MAX_DEVICE_POLL_MILLIS                 100000
-#define VXGE_HW_DEF_DEVICE_POLL_MILLIS                 1000
+                                               hwts_en:1;
+#define        VXGE_HW_HWTS_DISABLE                    0
+#define        VXGE_HW_HWTS_ENABLE                     1
+#define        VXGE_HW_HWTS_DEFAULT                    1
 
+       struct vxge_hw_vp_config vp_config[VXGE_HW_MAX_VIRTUAL_PATHS];
 };
 
 /**