#include <asm/io.h>
#include <asm/byteorder.h>
+#include "netxen_nic_hdr.h"
#include "netxen_nic_hw.h"
#define _NETXEN_NIC_LINUX_MAJOR 4
#define MPORT_SINGLE_FUNCTION_MODE 0x1111
#define MPORT_MULTI_FUNCTION_MODE 0x2222
-#include "netxen_nic_phan_reg.h"
-
/*
* NetXen host-peg signal message structure
*
#define NETXEN_NIC_RXPKT_DESC 0x04
#define NETXEN_OLD_RXPKT_DESC 0x3f
#define NETXEN_NIC_RESPONSE_DESC 0x05
+#define NETXEN_NIC_LRO_DESC 0x12
/* for status field in status_desc */
#define STATUS_NEED_CKSUM (1)
#define netxen_get_sts_opcode(sts_data) \
(((sts_data) >> 58) & 0x03F)
+#define netxen_get_lro_sts_refhandle(sts_data) \
+ ((sts_data) & 0x0FFFF)
+#define netxen_get_lro_sts_length(sts_data) \
+ (((sts_data) >> 16) & 0x0FFFF)
+#define netxen_get_lro_sts_l2_hdr_offset(sts_data) \
+ (((sts_data) >> 32) & 0x0FF)
+#define netxen_get_lro_sts_l4_hdr_offset(sts_data) \
+ (((sts_data) >> 40) & 0x0FF)
+#define netxen_get_lro_sts_timestamp(sts_data) \
+ (((sts_data) >> 48) & 0x1)
+#define netxen_get_lro_sts_type(sts_data) \
+ (((sts_data) >> 49) & 0x7)
+#define netxen_get_lro_sts_push_flag(sts_data) \
+ (((sts_data) >> 52) & 0x1)
+#define netxen_get_lro_sts_seq_number(sts_data) \
+ ((sts_data) & 0x0FFFFFFFF)
+
+
struct status_desc {
__le64 status_desc_data[2];
} __attribute__ ((aligned(16)));
#define NETXEN_BRDTYPE_P3_10G_XFP 0x0032
#define NETXEN_BRDTYPE_P3_10G_TP 0x0080
-struct netxen_board_info {
- u32 header_version;
-
- u32 board_mfg;
- u32 board_type;
- u32 board_num;
- u32 chip_id;
- u32 chip_minor;
- u32 chip_major;
- u32 chip_pkg;
- u32 chip_lot;
-
- u32 port_mask; /* available niu ports */
- u32 peg_mask; /* available pegs */
- u32 icache_ok; /* can we run with icache? */
- u32 dcache_ok; /* can we run with dcache? */
- u32 casper_ok;
-
- u32 mac_addr_lo_0;
- u32 mac_addr_lo_1;
- u32 mac_addr_lo_2;
- u32 mac_addr_lo_3;
-
- /* MN-related config */
- u32 mn_sync_mode; /* enable/ sync shift cclk/ sync shift mclk */
- u32 mn_sync_shift_cclk;
- u32 mn_sync_shift_mclk;
- u32 mn_wb_en;
- u32 mn_crystal_freq; /* in MHz */
- u32 mn_speed; /* in MHz */
- u32 mn_org;
- u32 mn_depth;
- u32 mn_ranks_0; /* ranks per slot */
- u32 mn_ranks_1; /* ranks per slot */
- u32 mn_rd_latency_0;
- u32 mn_rd_latency_1;
- u32 mn_rd_latency_2;
- u32 mn_rd_latency_3;
- u32 mn_rd_latency_4;
- u32 mn_rd_latency_5;
- u32 mn_rd_latency_6;
- u32 mn_rd_latency_7;
- u32 mn_rd_latency_8;
- u32 mn_dll_val[18];
- u32 mn_mode_reg; /* MIU DDR Mode Register */
- u32 mn_ext_mode_reg; /* MIU DDR Extended Mode Register */
- u32 mn_timing_0; /* MIU Memory Control Timing Rgister */
- u32 mn_timing_1; /* MIU Extended Memory Ctrl Timing Register */
- u32 mn_timing_2; /* MIU Extended Memory Ctrl Timing2 Register */
-
- /* SN-related config */
- u32 sn_sync_mode; /* enable/ sync shift cclk / sync shift mclk */
- u32 sn_pt_mode; /* pass through mode */
- u32 sn_ecc_en;
- u32 sn_wb_en;
- u32 sn_crystal_freq;
- u32 sn_speed;
- u32 sn_org;
- u32 sn_depth;
- u32 sn_dll_tap;
- u32 sn_rd_latency;
-
- u32 mac_addr_hi_0;
- u32 mac_addr_hi_1;
- u32 mac_addr_hi_2;
- u32 mac_addr_hi_3;
-
- u32 magic; /* indicates flash has been initialized */
-
- u32 mn_rdimm;
- u32 mn_dll_override;
-
-};
-
-#define FLASH_NUM_PORTS (4)
-
-struct netxen_flash_mac_addr {
- u32 flash_addr[32];
-};
-
-struct netxen_user_old_info {
- u8 flash_md5[16];
- u8 crbinit_md5[16];
- u8 brdcfg_md5[16];
- /* bootloader */
- u32 bootld_version;
- u32 bootld_size;
- u8 bootld_md5[16];
- /* image */
- u32 image_version;
- u32 image_size;
- u8 image_md5[16];
- /* primary image status */
- u32 primary_status;
- u32 secondary_present;
-
- /* MAC address , 4 ports */
- struct netxen_flash_mac_addr mac_addr[FLASH_NUM_PORTS];
-};
-#define FLASH_NUM_MAC_PER_PORT 32
-struct netxen_user_info {
- u8 flash_md5[16 * 64];
- /* bootloader */
- u32 bootld_version;
- u32 bootld_size;
- /* image */
- u32 image_version;
- u32 image_size;
- /* primary image status */
- u32 primary_status;
- u32 secondary_present;
-
- /* MAC address , 4 ports, 32 address per port */
- u64 mac_addr[FLASH_NUM_PORTS * FLASH_NUM_MAC_PER_PORT];
- u32 sub_sys_id;
- u8 serial_num[32];
-
- /* Any user defined data */
-};
-
-/*
- * Flash Layout - new format.
- */
-struct netxen_new_user_info {
- u8 flash_md5[16 * 64];
- /* bootloader */
- u32 bootld_version;
- u32 bootld_size;
- /* image */
- u32 image_version;
- u32 image_size;
- /* primary image status */
- u32 primary_status;
- u32 secondary_present;
-
- /* MAC address , 4 ports, 32 address per port */
- u64 mac_addr[FLASH_NUM_PORTS * FLASH_NUM_MAC_PER_PORT];
- u32 sub_sys_id;
- u8 serial_num[32];
-
- /* Any user defined data */
-};
-
-#define SECONDARY_IMAGE_PRESENT 0xb3b4b5b6
-#define SECONDARY_IMAGE_ABSENT 0xffffffff
-#define PRIMARY_IMAGE_GOOD 0x5a5a5a5a
-#define PRIMARY_IMAGE_BAD 0xffffffff
-
/* Flash memory map */
#define NETXEN_CRBINIT_START 0 /* crbinit section */
#define NETXEN_BRDCFG_START 0x4000 /* board config */
#define NETXEN_PXE_START 0x3E0000 /* PXE boot rom */
#define NETXEN_USER_START 0x3E8000 /* Firmare info */
#define NETXEN_FIXED_START 0x3F0000 /* backup of crbinit */
+#define NETXEN_USER_START_OLD NETXEN_PXE_START /* very old flash */
+#define NX_OLD_MAC_ADDR_OFFSET (NETXEN_USER_START)
#define NX_FW_VERSION_OFFSET (NETXEN_USER_START+0x408)
#define NX_FW_SIZE_OFFSET (NETXEN_USER_START+0x40c)
+#define NX_FW_MAC_ADDR_OFFSET (NETXEN_USER_START+0x418)
+#define NX_FW_SERIAL_NUM_OFFSET (NETXEN_USER_START+0x81c)
#define NX_BIOS_VERSION_OFFSET (NETXEN_USER_START+0x83c)
+
+#define NX_HDR_VERSION_OFFSET (NETXEN_BRDCFG_START)
+#define NX_BRDTYPE_OFFSET (NETXEN_BRDCFG_START+0x8)
#define NX_FW_MAGIC_OFFSET (NETXEN_BRDCFG_START+0x128)
+
#define NX_FW_MIN_SIZE (0x3fffff)
#define NX_P2_MN_ROMIMAGE 0
#define NX_P3_CT_ROMIMAGE 1
#define NX_P3_MN_ROMIMAGE 2
#define NX_FLASH_ROMIMAGE 3
-#define NETXEN_USER_START_OLD NETXEN_PXE_START /* for backward compatibility */
-
-#define NETXEN_FLASH_START (NETXEN_CRBINIT_START)
-#define NETXEN_INIT_SECTOR (0)
-#define NETXEN_PRIMARY_START (NETXEN_BOOTLD_START)
-#define NETXEN_FLASH_CRBINIT_SIZE (0x4000)
-#define NETXEN_FLASH_BRDCFG_SIZE (sizeof(struct netxen_board_info))
-#define NETXEN_FLASH_USER_SIZE (sizeof(struct netxen_user_info)/sizeof(u32))
-#define NETXEN_FLASH_SECONDARY_SIZE (NETXEN_USER_START-NETXEN_SECONDARY_START)
-#define NETXEN_NUM_PRIMARY_SECTORS (0x20)
-#define NETXEN_NUM_CONFIG_SECTORS (1)
extern char netxen_nic_driver_name[];
/* Number of status descriptors to handle per interrupt */
u64 length;
};
-#define _netxen_set_bits(config_word, start, bits, val) {\
- unsigned long long __tmask = (((1ULL << (bits)) - 1) << (start));\
- unsigned long long __tvalue = (val); \
- (config_word) &= ~__tmask; \
- (config_word) |= (((__tvalue) << (start)) & __tmask); \
-}
-
-#define _netxen_clear_bits(config_word, start, bits) {\
- unsigned long long __tmask = (((1ULL << (bits)) - 1) << (start)); \
- (config_word) &= ~__tmask; \
-}
+struct netxen_recv_crb {
+ u32 crb_rcv_producer[NUM_RCV_DESC_RINGS];
+ u32 crb_sts_consumer[NUM_STS_DESC_RINGS];
+ u32 sw_int_mask[NUM_STS_DESC_RINGS];
+};
/* Following defines are for the state of the buffers */
#define NETXEN_BUFFER_FREE 0
u64 rxdropped;
u64 txdropped;
u64 csummed;
- u64 no_rcv;
+ u64 rx_pkts;
+ u64 lro_pkts;
u64 rxbytes;
u64 txbytes;
};
#define NX_CAP0_LSO NX_CAP_BIT(0, 6)
#define NX_CAP0_JUMBO_CONTIGUOUS NX_CAP_BIT(0, 7)
#define NX_CAP0_LRO_CONTIGUOUS NX_CAP_BIT(0, 8)
+#define NX_CAP0_HW_LRO NX_CAP_BIT(0, 10)
/*
* Context state
#define NX_NIC_H2C_OPCODE_PROXY_STOP_DONE 20
#define NX_NIC_H2C_OPCODE_GET_LINKEVENT 21
#define NX_NIC_C2C_OPCODE 22
-#define NX_NIC_H2C_OPCODE_LAST 23
+#define NX_NIC_H2C_OPCODE_CONFIG_HW_LRO 24
+#define NX_NIC_H2C_OPCODE_LAST 25
/*
* Firmware --> Driver
#define VPORT_MISS_MODE_ACCEPT_ALL 1 /* accept all packets */
#define VPORT_MISS_MODE_ACCEPT_MULTI 2 /* accept unmatched multicast */
+#define NX_NIC_LRO_REQUEST_FIRST 0
+#define NX_NIC_LRO_REQUEST_ADD_FLOW 1
+#define NX_NIC_LRO_REQUEST_DELETE_FLOW 2
+#define NX_NIC_LRO_REQUEST_TIMER 3
+#define NX_NIC_LRO_REQUEST_CLEANUP 4
+#define NX_NIC_LRO_REQUEST_ADD_FLOW_SCHEDULED 5
+#define NX_TOE_LRO_REQUEST_ADD_FLOW 6
+#define NX_TOE_LRO_REQUEST_ADD_FLOW_RESPONSE 7
+#define NX_TOE_LRO_REQUEST_DELETE_FLOW 8
+#define NX_TOE_LRO_REQUEST_DELETE_FLOW_RESPONSE 9
+#define NX_TOE_LRO_REQUEST_TIMER 10
+#define NX_NIC_LRO_REQUEST_LAST 11
+
#define NX_FW_CAPABILITY_LINK_NOTIFICATION (1 << 5)
#define NX_FW_CAPABILITY_SWITCHING (1 << 6)
#define NX_FW_CAPABILITY_PEXQ (1 << 7)
#define NX_FW_CAPABILITY_BDG (1 << 8)
#define NX_FW_CAPABILITY_FVLANTX (1 << 9)
+#define NX_FW_CAPABILITY_HW_LRO (1 << 10)
/* module types */
#define LINKEVENT_MODULE_NOT_PRESENT 1
#define NETXEN_NIC_MSI_ENABLED 0x02
#define NETXEN_NIC_MSIX_ENABLED 0x04
+#define NETXEN_NIC_LRO_ENABLED 0x08
#define NETXEN_IS_MSI_FAMILY(adapter) \
((adapter)->flags & (NETXEN_NIC_MSI_ENABLED | NETXEN_NIC_MSIX_ENABLED))
u8 mc_enabled;
u8 max_mc_count;
u8 rss_supported;
- u8 resv2;
+ u8 link_changed;
u32 resv3;
u8 has_link_events;
struct netxen_recv_context recv_ctx;
struct nx_host_tx_ring *tx_ring;
- int (*enable_phy_interrupts) (struct netxen_adapter *);
- int (*disable_phy_interrupts) (struct netxen_adapter *);
int (*macaddr_set) (struct netxen_adapter *, u8 *);
int (*set_mtu) (struct netxen_adapter *, int);
int (*set_promisc) (struct netxen_adapter *, u32);
const struct firmware *fw;
};
-int netxen_niu_xgbe_enable_phy_interrupts(struct netxen_adapter *adapter);
-int netxen_niu_gbe_enable_phy_interrupts(struct netxen_adapter *adapter);
-int netxen_niu_xgbe_disable_phy_interrupts(struct netxen_adapter *adapter);
-int netxen_niu_gbe_disable_phy_interrupts(struct netxen_adapter *adapter);
+int netxen_niu_xg_set_promiscuous_mode(struct netxen_adapter *adapter,
+ u32 mode);
+int netxen_niu_xg_init_port(struct netxen_adapter *adapter, int port);
+int netxen_niu_disable_xg_port(struct netxen_adapter *adapter);
+
int netxen_niu_gbe_phy_read(struct netxen_adapter *adapter, long reg,
__u32 * readval);
int netxen_niu_gbe_phy_write(struct netxen_adapter *adapter,
int nx_fw_cmd_set_mtu(struct netxen_adapter *adapter, int mtu);
int netxen_nic_change_mtu(struct net_device *netdev, int new_mtu);
+int netxen_config_hw_lro(struct netxen_adapter *adapter, int enable);
+int netxen_send_lro_cleanup(struct netxen_adapter *adapter);
int netxen_nic_set_mac(struct net_device *netdev, void *p);
struct net_device_stats *netxen_nic_get_stats(struct net_device *netdev);
git.openpandora.org / pandora-kernel.git / blobdiff