can: flexcan: put TX mailbox into TX_INACTIVE mode after tx-complete
[pandora-kernel.git] / drivers / net / can / flexcan.c
index e023379..b1f354f 100644 (file)
@@ -60,7 +60,7 @@
 #define FLEXCAN_MCR_BCC                        BIT(16)
 #define FLEXCAN_MCR_LPRIO_EN           BIT(13)
 #define FLEXCAN_MCR_AEN                        BIT(12)
-#define FLEXCAN_MCR_MAXMB(x)           ((x) & 0xf)
+#define FLEXCAN_MCR_MAXMB(x)           ((x) & 0x1f)
 #define FLEXCAN_MCR_IDAM_A             (0 << 8)
 #define FLEXCAN_MCR_IDAM_B             (1 << 8)
 #define FLEXCAN_MCR_IDAM_C             (2 << 8)
        (FLEXCAN_ESR_ERR_BUS | FLEXCAN_ESR_ERR_STATE)
 
 /* FLEXCAN interrupt flag register (IFLAG) bits */
-#define FLEXCAN_TX_BUF_ID              8
+/* Errata ERR005829 step7: Reserve first valid MB */
+#define FLEXCAN_TX_BUF_RESERVED                8
+#define FLEXCAN_TX_BUF_ID              9
 #define FLEXCAN_IFLAG_BUF(x)           BIT(x)
 #define FLEXCAN_IFLAG_RX_FIFO_OVERFLOW BIT(7)
 #define FLEXCAN_IFLAG_RX_FIFO_WARN     BIT(6)
 
 /* FLEXCAN message buffers */
 #define FLEXCAN_MB_CNT_CODE(x)         (((x) & 0xf) << 24)
+#define FLEXCAN_MB_CODE_RX_INACTIVE    (0x0 << 24)
+#define FLEXCAN_MB_CODE_RX_EMPTY       (0x4 << 24)
+#define FLEXCAN_MB_CODE_RX_FULL                (0x2 << 24)
+#define FLEXCAN_MB_CODE_RX_OVERRRUN    (0x6 << 24)
+#define FLEXCAN_MB_CODE_RX_RANSWER     (0xa << 24)
+
+#define FLEXCAN_MB_CODE_TX_INACTIVE    (0x8 << 24)
+#define FLEXCAN_MB_CODE_TX_ABORT       (0x9 << 24)
+#define FLEXCAN_MB_CODE_TX_DATA                (0xc << 24)
+#define FLEXCAN_MB_CODE_TX_TANSWER     (0xe << 24)
+
 #define FLEXCAN_MB_CNT_SRR             BIT(22)
 #define FLEXCAN_MB_CNT_IDE             BIT(21)
 #define FLEXCAN_MB_CNT_RTR             BIT(20)
@@ -302,6 +315,14 @@ static int flexcan_start_xmit(struct sk_buff *skb, struct net_device *dev)
        flexcan_write(can_id, &regs->cantxfg[FLEXCAN_TX_BUF_ID].can_id);
        flexcan_write(ctrl, &regs->cantxfg[FLEXCAN_TX_BUF_ID].can_ctrl);
 
+       /* Errata ERR005829 step8:
+        * Write twice INACTIVE(0x8) code to first MB.
+        */
+       flexcan_write(FLEXCAN_MB_CODE_TX_INACTIVE,
+                     &regs->cantxfg[FLEXCAN_TX_BUF_RESERVED].can_ctrl);
+       flexcan_write(FLEXCAN_MB_CODE_TX_INACTIVE,
+                     &regs->cantxfg[FLEXCAN_TX_BUF_RESERVED].can_ctrl);
+
        kfree_skb(skb);
 
        /* tx_packets is incremented in flexcan_irq */
@@ -611,6 +632,9 @@ static irqreturn_t flexcan_irq(int irq, void *dev_id)
        if (reg_iflag1 & (1 << FLEXCAN_TX_BUF_ID)) {
                /* tx_bytes is incremented in flexcan_start_xmit */
                stats->tx_packets++;
+               /* after sending a RTR frame mailbox is in RX mode */
+               flexcan_write(FLEXCAN_MB_CODE_TX_INACTIVE,
+                             &regs->cantxfg[FLEXCAN_TX_BUF_ID].can_ctrl);
                flexcan_write((1 << FLEXCAN_TX_BUF_ID), &regs->iflag1);
                netif_wake_queue(dev);
        }
@@ -666,9 +690,9 @@ static int flexcan_chip_start(struct net_device *dev)
 {
        struct flexcan_priv *priv = netdev_priv(dev);
        struct flexcan_regs __iomem *regs = priv->base;
-       unsigned int i;
        int err;
        u32 reg_mcr, reg_ctrl;
+       int i;
 
        /* enable module */
        flexcan_chip_enable(priv);
@@ -700,9 +724,11 @@ static int flexcan_chip_start(struct net_device *dev)
         *
         */
        reg_mcr = flexcan_read(&regs->mcr);
+       reg_mcr &= ~FLEXCAN_MCR_MAXMB(0xff);
        reg_mcr |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_FEN | FLEXCAN_MCR_HALT |
                FLEXCAN_MCR_SUPV | FLEXCAN_MCR_WRN_EN |
-               FLEXCAN_MCR_IDAM_C;
+               FLEXCAN_MCR_IDAM_C |
+               FLEXCAN_MCR_MAXMB(FLEXCAN_TX_BUF_ID);
        dev_dbg(dev->dev.parent, "%s: writing mcr=0x%08x", __func__, reg_mcr);
        flexcan_write(reg_mcr, &regs->mcr);
 
@@ -732,17 +758,20 @@ static int flexcan_chip_start(struct net_device *dev)
        dev_dbg(dev->dev.parent, "%s: writing ctrl=0x%08x", __func__, reg_ctrl);
        flexcan_write(reg_ctrl, &regs->ctrl);
 
-       for (i = 0; i < ARRAY_SIZE(regs->cantxfg); i++) {
-               flexcan_write(0, &regs->cantxfg[i].can_ctrl);
-               flexcan_write(0, &regs->cantxfg[i].can_id);
-               flexcan_write(0, &regs->cantxfg[i].data[0]);
-               flexcan_write(0, &regs->cantxfg[i].data[1]);
-
-               /* put MB into rx queue */
-               flexcan_write(FLEXCAN_MB_CNT_CODE(0x4),
-                       &regs->cantxfg[i].can_ctrl);
+       /* clear and invalidate all mailboxes first */
+       for (i = FLEXCAN_TX_BUF_ID; i < ARRAY_SIZE(regs->cantxfg); i++) {
+               flexcan_write(FLEXCAN_MB_CODE_RX_INACTIVE,
+                             &regs->cantxfg[i].can_ctrl);
        }
 
+       /* Errata ERR005829: mark first TX mailbox as INACTIVE */
+       flexcan_write(FLEXCAN_MB_CODE_TX_INACTIVE,
+                     &regs->cantxfg[FLEXCAN_TX_BUF_RESERVED].can_ctrl);
+
+       /* mark TX mailbox as INACTIVE */
+       flexcan_write(FLEXCAN_MB_CODE_TX_INACTIVE,
+                     &regs->cantxfg[FLEXCAN_TX_BUF_ID].can_ctrl);
+
        /* acceptance mask/acceptance code (accept everything) */
        flexcan_write(0x0, &regs->rxgmask);
        flexcan_write(0x0, &regs->rx14mask);
@@ -783,14 +812,16 @@ static void flexcan_chip_stop(struct net_device *dev)
        struct flexcan_regs __iomem *regs = priv->base;
        u32 reg;
 
-       /* Disable all interrupts */
-       flexcan_write(0, &regs->imask1);
-
        /* Disable + halt module */
        reg = flexcan_read(&regs->mcr);
        reg |= FLEXCAN_MCR_MDIS | FLEXCAN_MCR_HALT;
        flexcan_write(reg, &regs->mcr);
 
+       /* Disable all interrupts */
+       flexcan_write(0, &regs->imask1);
+       flexcan_write(priv->reg_ctrl_default & ~FLEXCAN_CTRL_ERR_ALL,
+                     &regs->ctrl);
+
        flexcan_transceiver_switch(priv, 0);
        priv->can.state = CAN_STATE_STOPPED;
 
@@ -815,12 +846,14 @@ static int flexcan_open(struct net_device *dev)
        /* start chip and queuing */
        err = flexcan_chip_start(dev);
        if (err)
-               goto out_close;
+               goto out_free_irq;
        napi_enable(&priv->napi);
        netif_start_queue(dev);
 
        return 0;
 
+ out_free_irq:
+       free_irq(dev->irq, dev);
  out_close:
        close_candev(dev);
  out:
@@ -933,12 +966,12 @@ static int __devinit flexcan_probe(struct platform_device *pdev)
        u32 clock_freq = 0;
 
        if (pdev->dev.of_node) {
-               const u32 *clock_freq_p;
+               const __be32 *clock_freq_p;
 
                clock_freq_p = of_get_property(pdev->dev.of_node,
                                                "clock-frequency", NULL);
                if (clock_freq_p)
-                       clock_freq = *clock_freq_p;
+                       clock_freq = be32_to_cpup(clock_freq_p);
        }
 
        if (!clock_freq) {
@@ -1029,6 +1062,7 @@ static int __devexit flexcan_remove(struct platform_device *pdev)
        struct resource *mem;
 
        unregister_flexcandev(dev);
+       netif_napi_del(&priv->napi);
        platform_set_drvdata(pdev, NULL);
        iounmap(priv->base);