#define CX23885_BOARD_MYGICA_X8558PRO 27
#define CX23885_BOARD_LEADTEK_WINFAST_PXTV1200 28
#define CX23885_BOARD_GOTVIEW_X5_3D_HYBRID 29
+#define CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF 30
#define GPIO_0 0x00000001
#define GPIO_1 0x00000002
struct cx23885_board {
char *name;
port_t porta, portb, portc;
+ int num_fds_portb, num_fds_portc;
unsigned int tuner_type;
unsigned int radio_type;
unsigned char tuner_addr;
unsigned char radio_addr;
+ unsigned int tuner_bus;
/* Vendors can and do run the PCIe bridge at different
* clock rates, driven physically by crystals on the PCBs.
*/
u32 clk_freq;
struct cx23885_input input[MAX_CX23885_INPUT];
- int cimax; /* for NetUP */
+ int ci_type; /* for NetUP */
};
struct cx23885_subid {
/* Allow a single tsport to have multiple frontends */
u32 num_frontends;
+ void (*gate_ctrl)(struct cx23885_tsport *port, int open);
void *port_priv;
};
v4l2_std_id tvnorm;
unsigned int tuner_type;
unsigned char tuner_addr;
+ unsigned int tuner_bus;
unsigned int radio_type;
unsigned char radio_addr;
unsigned int has_radio;