void cx18_sw1_irq_enable(struct cx18 *cx, u32 val)
{
u32 r;
- cx18_write_reg(cx, val, SW1_INT_STATUS);
+ cx18_write_reg_noretry(cx, val, SW1_INT_STATUS);
r = cx18_read_reg(cx, SW1_INT_ENABLE_PCI);
cx18_write_reg(cx, r | val, SW1_INT_ENABLE_PCI);
}
void cx18_sw2_irq_enable(struct cx18 *cx, u32 val)
{
u32 r;
- cx18_write_reg(cx, val, SW2_INT_STATUS);
+ cx18_write_reg_noretry(cx, val, SW2_INT_STATUS);
r = cx18_read_reg(cx, SW2_INT_ENABLE_PCI);
cx18_write_reg(cx, r | val, SW2_INT_ENABLE_PCI);
}