drm/radeon/kms: use lcd pll limits when available

[pandora-kernel.git] / drivers / gpu / drm / radeon / radeon_mode.h

diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
index 91cb041..b868ffa 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -83,6 +83,8 @@ struct radeon_i2c_bus_rec {
        bool valid;
        /* id used by atom */
        uint8_t i2c_id;
+       /* id used by atom */
+       uint8_t hpd_id;
        /* can be used with hw i2c engine */
        bool hw_capable;
        /* uses multi-media i2c engine */
@@ -113,6 +115,7 @@ struct radeon_tmds_pll {
 
 #define RADEON_MAX_BIOS_CONNECTOR 16
 
+/* pll flags */
 #define RADEON_PLL_USE_BIOS_DIVS        (1 << 0)
 #define RADEON_PLL_NO_ODD_POST_DIV      (1 << 1)
 #define RADEON_PLL_USE_REF_DIV          (1 << 2)
@@ -125,16 +128,33 @@ struct radeon_tmds_pll {
 #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
 #define RADEON_PLL_USE_FRAC_FB_DIV      (1 << 10)
 #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
+#define RADEON_PLL_USE_POST_DIV         (1 << 12)
+#define RADEON_PLL_IS_LCD               (1 << 13)
+
+/* pll algo */
+enum radeon_pll_algo {
+       PLL_ALGO_LEGACY,
+       PLL_ALGO_NEW
+};
 
 struct radeon_pll {
-       uint16_t reference_freq;
-       uint16_t reference_div;
+       /* reference frequency */
+       uint32_t reference_freq;
+
+       /* fixed dividers */
+       uint32_t reference_div;
+       uint32_t post_div;
+
+       /* pll in/out limits */
        uint32_t pll_in_min;
        uint32_t pll_in_max;
        uint32_t pll_out_min;
        uint32_t pll_out_max;
-       uint16_t xclk;
+       uint32_t lcd_pll_out_min;
+       uint32_t lcd_pll_out_max;
+       uint32_t best_vco;
 
+       /* divider limits */
        uint32_t min_ref_div;
        uint32_t max_ref_div;
        uint32_t min_post_div;
@@ -143,7 +163,19 @@ struct radeon_pll {
        uint32_t max_feedback_div;
        uint32_t min_frac_feedback_div;
        uint32_t max_frac_feedback_div;
-       uint32_t best_vco;
+
+       /* flags for the current clock */
+       uint32_t flags;
+
+       /* pll id */
+       uint32_t id;
+       /* pll algo */
+       enum radeon_pll_algo algo;
+};
+
+struct i2c_algo_radeon_data {
+       struct i2c_adapter bit_adapter;
+       struct i2c_algo_bit_data bit_data;
 };
 
 struct radeon_i2c_chan {
@@ -151,7 +183,7 @@ struct radeon_i2c_chan {
        struct drm_device *dev;
        union {
                struct i2c_algo_dp_aux_data dp;
-               struct i2c_algo_bit_data bit;
+               struct i2c_algo_radeon_data radeon;
        } algo;
        struct radeon_i2c_bus_rec rec;
 };
@@ -180,7 +212,7 @@ struct radeon_mode_info {
        struct card_info *atom_card_info;
        enum radeon_connector_table connector_table;
        bool mode_config_initialized;
-       struct radeon_crtc *crtcs[2];
+       struct radeon_crtc *crtcs[6];
        /* DVI-I properties */
        struct drm_property *coherent_mode_property;
        /* DAC enable load detect */
@@ -189,7 +221,8 @@ struct radeon_mode_info {
        struct drm_property *tv_std_property;
        /* legacy TMDS PLL detect */
        struct drm_property *tmds_pll_property;
-
+       /* hardcoded DFP edid from BIOS */
+       struct edid *bios_hardcoded_edid;
 };
 
 #define MAX_H_CODE_TIMING_LEN 32
@@ -224,6 +257,7 @@ struct radeon_crtc {
        fixed20_12 vsc;
        fixed20_12 hsc;
        struct drm_display_mode native_mode;
+       int pll_id;
 };
 
 struct radeon_encoder_primary_dac {
@@ -286,10 +320,11 @@ struct radeon_atom_ss {
 struct radeon_encoder_atom_dig {
        /* atom dig */
        bool coherent_mode;
-       int dig_block;
+       int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB */
        /* atom lvds */
        uint32_t lvds_misc;
        uint16_t panel_pwr_delay;
+       enum radeon_pll_algo pll_algo;
        struct radeon_atom_ss *ss;
        /* panel mode */
        struct drm_display_mode native_mode;
@@ -385,6 +420,7 @@ extern void dp_link_train(struct drm_encoder *encoder,
                          struct drm_connector *connector);
 extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector);
 extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector);
+extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action);
 extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder,
                                           int action, uint8_t lane_num,
                                           uint8_t lane_set);
@@ -398,14 +434,15 @@ extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
                                                 struct radeon_i2c_bus_rec *rec,
                                                 const char *name);
 extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c);
-extern void radeon_i2c_sw_get_byte(struct radeon_i2c_chan *i2c_bus,
-                                  u8 slave_addr,
-                                  u8 addr,
-                                  u8 *val);
-extern void radeon_i2c_sw_put_byte(struct radeon_i2c_chan *i2c,
-                                  u8 slave_addr,
-                                  u8 addr,
-                                  u8 val);
+extern void radeon_i2c_destroy_dp(struct radeon_i2c_chan *i2c);
+extern void radeon_i2c_get_byte(struct radeon_i2c_chan *i2c_bus,
+                               u8 slave_addr,
+                               u8 addr,
+                               u8 *val);
+extern void radeon_i2c_put_byte(struct radeon_i2c_chan *i2c,
+                               u8 slave_addr,
+                               u8 addr,
+                               u8 val);
 extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector);
 extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector);
 
@@ -417,17 +454,7 @@ extern void radeon_compute_pll(struct radeon_pll *pll,
                               uint32_t *fb_div_p,
                               uint32_t *frac_fb_div_p,
                               uint32_t *ref_div_p,
-                              uint32_t *post_div_p,
-                              int flags);
-
-extern void radeon_compute_pll_avivo(struct radeon_pll *pll,
-                                    uint64_t freq,
-                                    uint32_t *dot_clock_p,
-                                    uint32_t *fb_div_p,
-                                    uint32_t *frac_fb_div_p,
-                                    uint32_t *ref_div_p,
-                                    uint32_t *post_div_p,
-                                    int flags);
+                              uint32_t *post_div_p);
 
 extern void radeon_setup_encoder_clones(struct drm_device *dev);
 
@@ -453,7 +480,6 @@ extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
 
 extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
                                 struct drm_framebuffer *old_fb);
-extern void radeon_legacy_atom_set_surface(struct drm_crtc *crtc);
 
 extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
                                  struct drm_file *file_priv,
@@ -463,6 +489,9 @@ extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
 extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
                                   int x, int y);
 
+extern bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev);
+extern struct edid *
+radeon_combios_get_hardcoded_edid(struct radeon_device *rdev);
 extern bool radeon_atom_get_clock_info(struct drm_device *dev);
 extern bool radeon_combios_get_clock_info(struct drm_device *dev);
 extern struct radeon_encoder_atom_dig *
@@ -521,7 +550,6 @@ void radeon_atombios_init_crtc(struct drm_device *dev,
                               struct radeon_crtc *radeon_crtc);
 void radeon_legacy_init_crtc(struct drm_device *dev,
                             struct radeon_crtc *radeon_crtc);
-extern void radeon_i2c_do_lock(struct radeon_i2c_chan *i2c, int lock_state);
 
 void radeon_get_clock_info(struct drm_device *dev);