drm/radeon: fix ring free alignment calculations

[pandora-kernel.git] / drivers / gpu / drm / radeon / radeon_drv.h

diff --git a/drivers/gpu/drm/radeon/radeon_drv.h b/drivers/gpu/drm/radeon/radeon_drv.h
index ed4d27e..0c6bfc1 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon_drv.h
+++ b/drivers/gpu/drm/radeon/radeon_drv.h
@@ -99,9 +99,10 @@
  * 1.27- Add support for IGP GART
  * 1.28- Add support for VBL on CRTC2
  * 1.29- R500 3D cmd buffer support
+ * 1.30- Add support for occlusion queries
  */
 #define DRIVER_MAJOR           1
-#define DRIVER_MINOR           29
+#define DRIVER_MINOR           30
 #define DRIVER_PATCHLEVEL      0
 
 /*
@@ -1963,11 +1964,14 @@ do {                                                            \
 
 #define RING_LOCALS    int write, _nr, _align_nr; unsigned int mask; u32 *ring;
 
+#define RADEON_RING_ALIGN 16
+
 #define BEGIN_RING( n ) do {                                           \
        if ( RADEON_VERBOSE ) {                                         \
                DRM_INFO( "BEGIN_RING( %d )\n", (n));                   \
        }                                                               \
-       _align_nr = (n + 0xf) & ~0xf;                                   \
+       _align_nr = RADEON_RING_ALIGN - ((dev_priv->ring.tail + n) & (RADEON_RING_ALIGN-1));    \
+       _align_nr += n;                                                 \
        if (dev_priv->ring.space <= (_align_nr * sizeof(u32))) {        \
                 COMMIT_RING();                                         \
                radeon_wait_ring( dev_priv, _align_nr * sizeof(u32));   \