Merge branch 'sched-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...

[pandora-kernel.git] / drivers / gpu / drm / radeon / r100.c

diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 93fa735..f2204cb 100644 (file)
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -70,23 +70,6 @@ MODULE_FIRMWARE(FIRMWARE_R520);
 
 void r100_pre_page_flip(struct radeon_device *rdev, int crtc)
 {
-       struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc];
-       u32 tmp;
-
-       /* make sure flip is at vb rather than hb */
-       tmp = RREG32(RADEON_CRTC_OFFSET_CNTL + radeon_crtc->crtc_offset);
-       tmp &= ~RADEON_CRTC_OFFSET_FLIP_CNTL;
-       /* make sure pending bit is asserted */
-       tmp |= RADEON_CRTC_GUI_TRIG_OFFSET_LEFT_EN;
-       WREG32(RADEON_CRTC_OFFSET_CNTL + radeon_crtc->crtc_offset, tmp);
-
-       /* set pageflip to happen as late as possible in the vblank interval.
-        * same field for crtc1/2
-        */
-       tmp = RREG32(RADEON_CRTC_GEN_CNTL);
-       tmp &= ~RADEON_CRTC_VSTAT_MODE_MASK;
-       WREG32(RADEON_CRTC_GEN_CNTL, tmp);
-
        /* enable the pflip int */
        radeon_irq_kms_pflip_irq_get(rdev, crtc);
 }
@@ -1041,7 +1024,7 @@ int r100_cp_init(struct radeon_device *rdev, unsigned ring_size)
                return r;
        }
        rdev->cp.ready = true;
-       rdev->mc.active_vram_size = rdev->mc.real_vram_size;
+       radeon_ttm_set_active_vram_size(rdev, rdev->mc.real_vram_size);
        return 0;
 }
 
@@ -1059,7 +1042,7 @@ void r100_cp_fini(struct radeon_device *rdev)
 void r100_cp_disable(struct radeon_device *rdev)
 {
        /* Disable ring */
-       rdev->mc.active_vram_size = rdev->mc.visible_vram_size;
+       radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);
        rdev->cp.ready = false;
        WREG32(RADEON_CP_CSQ_MODE, 0);
        WREG32(RADEON_CP_CSQ_CNTL, 0);
@@ -1222,14 +1205,12 @@ int r100_cs_packet_parse_vline(struct radeon_cs_parser *p)
        if (waitreloc.reg != RADEON_WAIT_UNTIL ||
            waitreloc.count != 0) {
                DRM_ERROR("vline wait had illegal wait until segment\n");
-               r = -EINVAL;
-               return r;
+               return -EINVAL;
        }
 
        if (radeon_get_ib_value(p, waitreloc.idx + 1) != RADEON_WAIT_CRTC_VLINE) {
                DRM_ERROR("vline wait had illegal wait until\n");
-               r = -EINVAL;
-               return r;
+               return -EINVAL;
        }
 
        /* jump over the NOP */
@@ -1247,8 +1228,7 @@ int r100_cs_packet_parse_vline(struct radeon_cs_parser *p)
        obj = drm_mode_object_find(p->rdev->ddev, crtc_id, DRM_MODE_OBJECT_CRTC);
        if (!obj) {
                DRM_ERROR("cannot find crtc %d\n", crtc_id);
-               r = -EINVAL;
-               goto out;
+               return -EINVAL;
        }
        crtc = obj_to_crtc(obj);
        radeon_crtc = to_radeon_crtc(crtc);
@@ -1270,14 +1250,13 @@ int r100_cs_packet_parse_vline(struct radeon_cs_parser *p)
                        break;
                default:
                        DRM_ERROR("unknown crtc reloc\n");
-                       r = -EINVAL;
-                       goto out;
+                       return -EINVAL;
                }
                ib[h_idx] = header;
                ib[h_idx + 3] |= RADEON_ENG_DISPLAY_SELECT_CRTC1;
        }
-out:
-       return r;
+
+       return 0;
 }
 
 /**
@@ -2329,7 +2308,6 @@ void r100_vram_init_sizes(struct radeon_device *rdev)
        /* FIXME we don't use the second aperture yet when we could use it */
        if (rdev->mc.visible_vram_size > rdev->mc.aper_size)
                rdev->mc.visible_vram_size = rdev->mc.aper_size;
-       rdev->mc.active_vram_size = rdev->mc.visible_vram_size;
        config_aper_size = RREG32(RADEON_CONFIG_APER_SIZE);
        if (rdev->flags & RADEON_IS_IGP) {
                uint32_t tom;
@@ -3639,7 +3617,7 @@ int r100_ib_test(struct radeon_device *rdev)
        if (i < rdev->usec_timeout) {
                DRM_INFO("ib test succeeded in %u usecs\n", i);
        } else {
-               DRM_ERROR("radeon: ib test failed (sracth(0x%04X)=0x%08X)\n",
+               DRM_ERROR("radeon: ib test failed (scratch(0x%04X)=0x%08X)\n",
                          scratch, tmp);
                r = -EINVAL;
        }
@@ -3659,13 +3637,13 @@ int r100_ib_init(struct radeon_device *rdev)
 
        r = radeon_ib_pool_init(rdev);
        if (r) {
-               dev_err(rdev->dev, "failled initializing IB pool (%d).\n", r);
+               dev_err(rdev->dev, "failed initializing IB pool (%d).\n", r);
                r100_ib_fini(rdev);
                return r;
        }
        r = r100_ib_test(rdev);
        if (r) {
-               dev_err(rdev->dev, "failled testing IB (%d).\n", r);
+               dev_err(rdev->dev, "failed testing IB (%d).\n", r);
                r100_ib_fini(rdev);
                return r;
        }
@@ -3821,12 +3799,12 @@ static int r100_startup(struct radeon_device *rdev)
        /* 1M ring buffer */
        r = r100_cp_init(rdev, 1024 * 1024);
        if (r) {
-               dev_err(rdev->dev, "failled initializing CP (%d).\n", r);
+               dev_err(rdev->dev, "failed initializing CP (%d).\n", r);
                return r;
        }
        r = r100_ib_init(rdev);
        if (r) {
-               dev_err(rdev->dev, "failled initializing IB (%d).\n", r);
+               dev_err(rdev->dev, "failed initializing IB (%d).\n", r);
                return r;
        }
        return 0;