align >>= PAGE_SHIFT;
if (!nvbo->no_vm && dev_priv->chan_vm) {
+ if (dev_priv->card_type == NV_C0)
+ page_shift = 12;
+
ret = nouveau_vm_get(dev_priv->chan_vm, size, page_shift,
NV_MEM_ACCESS_RW, &nvbo->vma);
if (ret) {
man->default_caching = TTM_PL_FLAG_CACHED;
break;
case TTM_PL_VRAM:
- if (dev_priv->card_type == NV_50) {
+ if (dev_priv->card_type >= NV_50) {
man->func = &nouveau_vram_manager;
man->io_reserve_fastpath = false;
man->use_io_reserve_lru = true;
case TTM_PL_VRAM:
{
struct nouveau_vram *vram = mem->mm_node;
+ u8 page_shift;
if (!dev_priv->bar1_vm) {
mem->bus.offset = mem->start << PAGE_SHIFT;
break;
}
+ if (dev_priv->card_type == NV_C0)
+ page_shift = vram->page_shift;
+ else
+ page_shift = 12;
+
ret = nouveau_vm_get(dev_priv->bar1_vm, mem->bus.size,
- vram->page_shift, NV_MEM_ACCESS_RW,
+ page_shift, NV_MEM_ACCESS_RW,
&vram->bar_vma);
if (ret)
return ret;
return ret;
}
- mem->bus.offset = vram->bar_vma.offset;
- mem->bus.offset -= 0x0020000000ULL;
+ mem->bus.offset = vram->bar_vma.offset;
+ if (dev_priv->card_type == NV_50) /*XXX*/
+ mem->bus.offset -= 0x0020000000ULL;
mem->bus.base = pci_resource_start(dev->pdev, 1);
mem->bus.is_iomem = true;
}