* TODO
* Testing work
*/
-
+
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/libata.h>
#define DRV_NAME "pata_cmd64x"
-#define DRV_VERSION "0.2.1"
+#define DRV_VERSION "0.2.2"
/*
* CMD64x specific registers definition.
*/
-
+
enum {
CFR = 0x50,
CFR_INTR_CH0 = 0x02,
pci_read_config_byte(pdev, BMIDECSR, &r);
if (r & (1 << ap->port_no))
ap->cbl = ATA_CBL_PATA80;
- else
+ else
ap->cbl = ATA_CBL_PATA40;
-
+
return ata_std_prereset(ap);
}
*
* Called to do the PIO mode setup.
*/
-
+
static void cmd64x_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
struct ata_timing t;
const unsigned long T = 1000000 / 33;
const u8 setup_data[] = { 0x40, 0x40, 0x40, 0x80, 0x00 };
-
+
u8 reg;
-
+
/* Port layout is not logical so use a table */
- const u8 arttim_port[2][2] = {
+ const u8 arttim_port[2][2] = {
{ ARTTIM0, ARTTIM1 },
{ ARTTIM23, ARTTIM23 }
};
{ DRWTIM0, DRWTIM1 },
{ DRWTIM2, DRWTIM3 }
};
-
+
int arttim = arttim_port[ap->port_no][adev->devno];
int drwtim = drwtim_port[ap->port_no][adev->devno];
-
-
+
+
if (ata_timing_compute(adev, adev->pio_mode, &t, T, 0) < 0) {
printk(KERN_ERR DRV_NAME ": mode computation failed.\n");
return;
if (ap->port_no) {
/* Slave has shared address setup */
struct ata_device *pair = ata_dev_pair(adev);
-
+
if (pair) {
struct ata_timing tp;
ata_timing_compute(pair, pair->pio_mode, &tp, T, 0);
ata_timing_merge(&t, &tp, &t, ATA_TIMING_SETUP);
}
}
-
+
printk(KERN_DEBUG DRV_NAME ": active %d recovery %d setup %d.\n",
t.active, t.recover, t.setup);
if (t.recover > 16) {
}
if (t.active > 16)
t.active = 16;
-
+
/* Now convert the clocks into values we can actually stuff into
the chip */
-
+
if (t.recover > 1)
t.recover--;
else
t.recover = 15;
-
+
if (t.setup > 4)
t.setup = 0xC0;
else
t.setup = setup_data[t.setup];
-
+
t.active &= 0x0F; /* 0 = 16 */
-
+
/* Load setup timing */
pci_read_config_byte(pdev, arttim, ®);
reg &= 0x3F;
reg |= t.setup;
pci_write_config_byte(pdev, arttim, reg);
-
+
/* Load active/recovery */
- pci_write_config_byte(pdev, drwtim, (t.active << 4) | t.recover);
+ pci_write_config_byte(pdev, drwtim, (t.active << 4) | t.recover);
}
/**
*
* Called to do the DMA mode setup.
*/
-
+
static void cmd64x_set_dmamode(struct ata_port *ap, struct ata_device *adev)
{
static const u8 udma_data[] = {
- 0x31, 0x21, 0x11, 0x25, 0x15, 0x05
+ 0x30, 0x20, 0x10, 0x20, 0x10, 0x00
};
- static const u8 mwdma_data[] = {
+ static const u8 mwdma_data[] = {
0x30, 0x20, 0x10
};
-
+
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
u8 regU, regD;
int pciU = UDIDETCR0 + 8 * ap->port_no;
int pciD = BMIDESR0 + 8 * ap->port_no;
int shift = 2 * adev->devno;
-
+
pci_read_config_byte(pdev, pciD, ®D);
pci_read_config_byte(pdev, pciU, ®U);
- regD &= ~(0x20 << shift);
- regU &= ~(0x35 << shift);
-
- if (adev->dma_mode >= XFER_UDMA_0)
+ /* DMA bits off */
+ regD &= ~(0x20 << adev->devno);
+ /* DMA control bits */
+ regU &= ~(0x30 << shift);
+ /* DMA timing bits */
+ regU &= ~(0x05 << adev->devno);
+
+ if (adev->dma_mode >= XFER_UDMA_0) {
+ /* Merge thge timing value */
regU |= udma_data[adev->dma_mode - XFER_UDMA_0] << shift;
- else
+ /* Merge the control bits */
+ regU |= 1 << adev->devno; /* UDMA on */
+ if (adev->dma_mode > 2) /* 15nS timing */
+ regU |= 4 << adev->devno;
+ } else
regD |= mwdma_data[adev->dma_mode - XFER_MW_DMA_0] << shift;
regD |= 0x20 << adev->devno;
struct ata_port *ap = qc->ap;
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
u8 dma_intr;
- int dma_reg = ap->port_no ? ARTTIM23_INTR_CH1 : CFR_INTR_CH0;
- int dma_mask = ap->port_no ? ARTTIM2 : CFR;
-
+ int dma_mask = ap->port_no ? ARTTIM23_INTR_CH1 : CFR_INTR_CH0;
+ int dma_reg = ap->port_no ? ARTTIM2 : CFR;
+
ata_bmdma_stop(qc);
-
+
pci_read_config_byte(pdev, dma_reg, &dma_intr);
pci_write_config_byte(pdev, dma_reg, dma_intr | dma_mask);
}
-
+
/**
* cmd646r1_dma_stop - DMA stop callback
* @qc: Command in progress
{
ata_bmdma_stop(qc);
}
-
+
static struct scsi_host_template cmd64x_sht = {
.module = THIS_MODULE,
.name = DRV_NAME,
.can_queue = ATA_DEF_QUEUE,
.this_id = ATA_SHT_THIS_ID,
.sg_tablesize = LIBATA_MAX_PRD,
- .max_sectors = ATA_MAX_SECTORS,
.cmd_per_lun = ATA_SHT_CMD_PER_LUN,
.emulated = ATA_SHT_EMULATED,
.use_clustering = ATA_SHT_USE_CLUSTERING,
.proc_name = DRV_NAME,
.dma_boundary = ATA_DMA_BOUNDARY,
.slave_configure = ata_scsi_slave_config,
+ .slave_destroy = ata_scsi_slave_destroy,
.bios_param = ata_std_bios_param,
+ .resume = ata_scsi_device_resume,
+ .suspend = ata_scsi_device_suspend,
};
static struct ata_port_operations cmd64x_port_ops = {
.qc_prep = ata_qc_prep,
.qc_issue = ata_qc_issue_prot,
- .eng_timeout = ata_eng_timeout,
+
.data_xfer = ata_pio_data_xfer,
.irq_handler = ata_interrupt,
.irq_clear = ata_bmdma_irq_clear,
-
+
.port_start = ata_port_start,
.port_stop = ata_port_stop,
.host_stop = ata_host_stop
-};
+};
static struct ata_port_operations cmd646r1_port_ops = {
.port_disable = ata_port_disable,
.qc_prep = ata_qc_prep,
.qc_issue = ata_qc_issue_prot,
- .eng_timeout = ata_eng_timeout,
+
.data_xfer = ata_pio_data_xfer,
.irq_handler = ata_interrupt,
.irq_clear = ata_bmdma_irq_clear,
-
+
.port_start = ata_port_start,
.port_stop = ata_port_stop,
.host_stop = ata_host_stop
-};
+};
static struct ata_port_operations cmd648_port_ops = {
.port_disable = ata_port_disable,
.qc_prep = ata_qc_prep,
.qc_issue = ata_qc_issue_prot,
- .eng_timeout = ata_eng_timeout,
+
.data_xfer = ata_pio_data_xfer,
.irq_handler = ata_interrupt,
.irq_clear = ata_bmdma_irq_clear,
-
+
.port_start = ata_port_start,
.port_stop = ata_port_stop,
.host_stop = ata_host_stop
-};
-
+};
+
static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
{
u32 class_rev;
-
+
static struct ata_port_info cmd_info[6] = {
{ /* CMD 643 - no UDMA */
.sht = &cmd64x_sht,
};
static struct ata_port_info *port_info[2], *info;
u8 mrdmode;
-
+
info = &cmd_info[id->driver_data];
-
+
pci_read_config_dword(pdev, PCI_CLASS_REVISION, &class_rev);
class_rev &= 0xFF;
-
+
if (id->driver_data == 0) /* 643 */
ata_pci_clear_simplex(pdev);
-
+
if (pdev->device == PCI_DEVICE_ID_CMD_646) {
/* Does UDMA work ? */
if (class_rev > 4)
mrdmode &= ~ 0x30; /* IRQ set up */
mrdmode |= 0x02; /* Memory read line enable */
pci_write_config_byte(pdev, MRDMODE, mrdmode);
-
+
/* Force PIO 0 here.. */
-
+
/* PPC specific fixup copied from old driver */
#ifdef CONFIG_PPC
pci_write_config_byte(pdev, UDIDETCR0, 0xF0);
#endif
-
+
port_info[0] = port_info[1] = info;
return ata_pci_init_one(pdev, port_info, 2);
}
-static struct pci_device_id cmd64x[] = {
- { PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_CMD_643, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
- { PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_CMD_646, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
- { PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_CMD_648, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4},
- { PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_CMD_649, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5},
- { 0, },
+static int cmd64x_reinit_one(struct pci_dev *pdev)
+{
+ u8 mrdmode;
+ pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 64);
+ pci_read_config_byte(pdev, MRDMODE, &mrdmode);
+ mrdmode &= ~ 0x30; /* IRQ set up */
+ mrdmode |= 0x02; /* Memory read line enable */
+ pci_write_config_byte(pdev, MRDMODE, mrdmode);
+#ifdef CONFIG_PPC
+ pci_write_config_byte(pdev, UDIDETCR0, 0xF0);
+#endif
+ return ata_pci_device_resume(pdev);
+}
+
+static const struct pci_device_id cmd64x[] = {
+ { PCI_VDEVICE(CMD, PCI_DEVICE_ID_CMD_643), 0 },
+ { PCI_VDEVICE(CMD, PCI_DEVICE_ID_CMD_646), 1 },
+ { PCI_VDEVICE(CMD, PCI_DEVICE_ID_CMD_648), 4 },
+ { PCI_VDEVICE(CMD, PCI_DEVICE_ID_CMD_649), 5 },
+
+ { },
};
static struct pci_driver cmd64x_pci_driver = {
- .name = DRV_NAME,
+ .name = DRV_NAME,
.id_table = cmd64x,
.probe = cmd64x_init_one,
- .remove = ata_pci_remove_one
+ .remove = ata_pci_remove_one,
+ .suspend = ata_pci_device_suspend,
+ .resume = cmd64x_reinit_one,
};
static int __init cmd64x_init(void)
return pci_register_driver(&cmd64x_pci_driver);
}
-
static void __exit cmd64x_exit(void)
{
pci_unregister_driver(&cmd64x_pci_driver);
}
-
MODULE_AUTHOR("Alan Cox");
MODULE_DESCRIPTION("low-level driver for CMD64x series PATA controllers");
MODULE_LICENSE("GPL");
git.openpandora.org / pandora-kernel.git / blobdiff