Merge branch 'x86-kbuild-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...

[pandora-kernel.git] / arch / x86 / oprofile / op_model_amd.c

diff --git a/arch/x86/oprofile/op_model_amd.c b/arch/x86/oprofile/op_model_amd.c
index 67f830d..39686c2 100644 (file)
--- a/arch/x86/oprofile/op_model_amd.c
+++ b/arch/x86/oprofile/op_model_amd.c
@@ -74,6 +74,45 @@ static struct op_ibs_config ibs_config;
 
 #endif
 
+#ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX
+
+static void op_mux_fill_in_addresses(struct op_msrs * const msrs)
+{
+       int i;
+
+       for (i = 0; i < NUM_VIRT_COUNTERS; i++) {
+               int hw_counter = op_x86_virt_to_phys(i);
+               if (reserve_perfctr_nmi(MSR_K7_PERFCTR0 + i))
+                       msrs->multiplex[i].addr = MSR_K7_PERFCTR0 + hw_counter;
+               else
+                       msrs->multiplex[i].addr = 0;
+       }
+}
+
+static void op_mux_switch_ctrl(struct op_x86_model_spec const *model,
+                              struct op_msrs const * const msrs)
+{
+       u64 val;
+       int i;
+
+       /* enable active counters */
+       for (i = 0; i < NUM_COUNTERS; ++i) {
+               int virt = op_x86_phys_to_virt(i);
+               if (!counter_config[virt].enabled)
+                       continue;
+               rdmsrl(msrs->controls[i].addr, val);
+               val &= model->reserved;
+               val |= op_x86_get_ctrl(model, &counter_config[virt]);
+               wrmsrl(msrs->controls[i].addr, val);
+       }
+}
+
+#else
+
+static inline void op_mux_fill_in_addresses(struct op_msrs * const msrs) { }
+
+#endif
+
 /* functions for op_amd_spec */
 
 static void op_amd_fill_in_addresses(struct op_msrs * const msrs)
@@ -94,15 +133,7 @@ static void op_amd_fill_in_addresses(struct op_msrs * const msrs)
                        msrs->controls[i].addr = 0;
        }
 
-#ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX
-       for (i = 0; i < NUM_VIRT_COUNTERS; i++) {
-               int hw_counter = i % NUM_COUNTERS;
-               if (reserve_perfctr_nmi(MSR_K7_PERFCTR0 + i))
-                       msrs->multiplex[i].addr = MSR_K7_PERFCTR0 + hw_counter;
-               else
-                       msrs->multiplex[i].addr = 0;
-       }
-#endif
+       op_mux_fill_in_addresses(msrs);
 }
 
 static void op_amd_setup_ctrs(struct op_x86_model_spec const *model,
@@ -113,11 +144,10 @@ static void op_amd_setup_ctrs(struct op_x86_model_spec const *model,
 
        /* setup reset_value */
        for (i = 0; i < NUM_VIRT_COUNTERS; ++i) {
-               if (counter_config[i].enabled) {
+               if (counter_config[i].enabled)
                        reset_value[i] = counter_config[i].count;
-               } else {
+               else
                        reset_value[i] = 0;
-               }
        }
 
        /* clear all counters */
@@ -155,33 +185,9 @@ static void op_amd_setup_ctrs(struct op_x86_model_spec const *model,
        }
 }
 
-
-#ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX
-
-static void op_amd_switch_ctrl(struct op_x86_model_spec const *model,
-                              struct op_msrs const * const msrs)
-{
-       u64 val;
-       int i;
-
-       /* enable active counters */
-       for (i = 0; i < NUM_COUNTERS; ++i) {
-               int virt = op_x86_phys_to_virt(i);
-               if (!counter_config[virt].enabled)
-                       continue;
-               rdmsrl(msrs->controls[i].addr, val);
-               val &= model->reserved;
-               val |= op_x86_get_ctrl(model, &counter_config[virt]);
-               wrmsrl(msrs->controls[i].addr, val);
-       }
-}
-
-#endif
-
-
 #ifdef CONFIG_OPROFILE_IBS
 
-static inline int
+static inline void
 op_amd_handle_ibs(struct pt_regs * const regs,
                  struct op_msrs const * const msrs)
 {
@@ -189,7 +195,7 @@ op_amd_handle_ibs(struct pt_regs * const regs,
        struct op_entry entry;
 
        if (!has_ibs)
-               return 0;
+               return;
 
        if (ibs_config.fetch_enabled) {
                rdmsrl(MSR_AMD64_IBSFETCHCTL, ctl);
@@ -235,8 +241,6 @@ op_amd_handle_ibs(struct pt_regs * const regs,
                        wrmsrl(MSR_AMD64_IBSOPCTL, ctl);
                }
        }
-
-       return 1;
 }
 
 static inline void op_amd_start_ibs(void)
@@ -270,11 +274,8 @@ static void op_amd_stop_ibs(void)
 
 #else
 
-static inline int op_amd_handle_ibs(struct pt_regs * const regs,
-                                   struct op_msrs const * const msrs)
-{
-       return 0;
-}
+static inline void op_amd_handle_ibs(struct pt_regs * const regs,
+                                   struct op_msrs const * const msrs) { }
 static inline void op_amd_start_ibs(void) { }
 static inline void op_amd_stop_ibs(void) { }
 
@@ -519,11 +520,10 @@ static void op_amd_exit(void) {}
 
 #endif /* CONFIG_OPROFILE_IBS */
 
-struct op_x86_model_spec const op_amd_spec = {
+struct op_x86_model_spec op_amd_spec = {
        .num_counters           = NUM_COUNTERS,
        .num_controls           = NUM_CONTROLS,
        .num_virt_counters      = NUM_VIRT_COUNTERS,
-       .num_virt_controls      = NUM_VIRT_CONTROLS,
        .reserved               = MSR_AMD_EVENTSEL_RESERVED,
        .event_mask             = OP_EVENT_MASK,
        .init                   = op_amd_init,
@@ -535,6 +535,6 @@ struct op_x86_model_spec const op_amd_spec = {
        .stop                   = &op_amd_stop,
        .shutdown               = &op_amd_shutdown,
 #ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX
-       .switch_ctrl            = &op_amd_switch_ctrl,
+       .switch_ctrl            = &op_mux_switch_ctrl,
 #endif
 };