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Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6
[pandora-kernel.git]
/
arch
/
x86
/
kernel
/
apic
/
apic.c
diff --git
a/arch/x86/kernel/apic/apic.c
b/arch/x86/kernel/apic/apic.c
index
f9cecdf
..
85eb8e1
100644
(file)
--- a/
arch/x86/kernel/apic/apic.c
+++ b/
arch/x86/kernel/apic/apic.c
@@
-46,6
+46,7
@@
#include <asm/idle.h>
#include <asm/mtrr.h>
#include <asm/smp.h>
#include <asm/idle.h>
#include <asm/mtrr.h>
#include <asm/smp.h>
+#include <asm/mce.h>
unsigned int num_processors;
unsigned int num_processors;
@@
-808,7
+809,7
@@
void clear_local_APIC(void)
u32 v;
/* APIC hasn't been mapped yet */
u32 v;
/* APIC hasn't been mapped yet */
- if (!apic_phys)
+ if (!
x2apic && !
apic_phys)
return;
maxlvt = lapic_get_maxlvt();
return;
maxlvt = lapic_get_maxlvt();
@@
-842,6
+843,14
@@
void clear_local_APIC(void)
apic_write(APIC_LVTTHMR, v | APIC_LVT_MASKED);
}
#endif
apic_write(APIC_LVTTHMR, v | APIC_LVT_MASKED);
}
#endif
+#ifdef CONFIG_X86_MCE_INTEL
+ if (maxlvt >= 6) {
+ v = apic_read(APIC_LVTCMCI);
+ if (!(v & APIC_LVT_MASKED))
+ apic_write(APIC_LVTCMCI, v | APIC_LVT_MASKED);
+ }
+#endif
+
/*
* Clean APIC state for other OSs:
*/
/*
* Clean APIC state for other OSs:
*/
@@
-1241,6
+1250,12
@@
void __cpuinit setup_local_APIC(void)
apic_write(APIC_LVT1, value);
preempt_enable();
apic_write(APIC_LVT1, value);
preempt_enable();
+
+#ifdef CONFIG_X86_MCE_INTEL
+ /* Recheck CMCI information after local APIC is up on CPU #0 */
+ if (smp_processor_id() == 0)
+ cmci_recheck();
+#endif
}
void __cpuinit end_local_APIC_setup(void)
}
void __cpuinit end_local_APIC_setup(void)
@@
-1319,15
+1334,16
@@
void __init enable_IR_x2apic(void)
return;
}
return;
}
- local_irq_save(flags);
- mask_8259A();
-
- ret = save_mask_IO_APIC_setup();
+ ret = save_IO_APIC_setup();
if (ret) {
pr_info("Saving IO-APIC state failed: %d\n", ret);
goto end;
}
if (ret) {
pr_info("Saving IO-APIC state failed: %d\n", ret);
goto end;
}
+ local_irq_save(flags);
+ mask_IO_APIC_setup();
+ mask_8259A();
+
ret = enable_intr_remapping(1);
if (ret && x2apic_preenabled) {
ret = enable_intr_remapping(1);
if (ret && x2apic_preenabled) {
@@
-1352,10
+1368,10
@@
end_restore:
else
reinit_intr_remapped_IO_APIC(x2apic_preenabled);
else
reinit_intr_remapped_IO_APIC(x2apic_preenabled);
-end:
unmask_8259A();
local_irq_restore(flags);
unmask_8259A();
local_irq_restore(flags);
+end:
if (!ret) {
if (!x2apic_preenabled)
pr_info("Enabled x2apic and interrupt-remapping\n");
if (!ret) {
if (!x2apic_preenabled)
pr_info("Enabled x2apic and interrupt-remapping\n");
@@
-1508,12
+1524,10
@@
void __init early_init_lapic_mapping(void)
*/
void __init init_apic_mappings(void)
{
*/
void __init init_apic_mappings(void)
{
-#ifdef CONFIG_X86_X2APIC
if (x2apic) {
boot_cpu_physical_apicid = read_apic_id();
return;
}
if (x2apic) {
boot_cpu_physical_apicid = read_apic_id();
return;
}
-#endif
/*
* If no local APIC can be found then set up a fake all
/*
* If no local APIC can be found then set up a fake all
@@
-1957,12
+1971,9
@@
static int lapic_resume(struct sys_device *dev)
local_irq_save(flags);
local_irq_save(flags);
-#ifdef CONFIG_X86_X2APIC
if (x2apic)
enable_x2apic();
if (x2apic)
enable_x2apic();
- else
-#endif
- {
+ else {
/*
* Make sure the APICBASE points to the right address
*
/*
* Make sure the APICBASE points to the right address
*