Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input

[pandora-kernel.git] / arch / sparc64 / kernel / pci_impl.h

diff --git a/arch/sparc64/kernel/pci_impl.h b/arch/sparc64/kernel/pci_impl.h
index 8e38023..4a50da1 100644 (file)
--- a/arch/sparc64/kernel/pci_impl.h
+++ b/arch/sparc64/kernel/pci_impl.h
@@ -29,6 +29,33 @@
 #define PCI_STC_FLUSHFLAG_SET(STC) \
        (*((STC)->strbuf_flushflag) != 0UL)
 
+#ifdef CONFIG_PCI_MSI
+struct pci_pbm_info;
+struct sparc64_msiq_ops {
+       int (*get_head)(struct pci_pbm_info *pbm, unsigned long msiqid,
+                       unsigned long *head);
+       int (*dequeue_msi)(struct pci_pbm_info *pbm, unsigned long msiqid,
+                          unsigned long *head, unsigned long *msi);
+       int (*set_head)(struct pci_pbm_info *pbm, unsigned long msiqid,
+                       unsigned long head);
+       int (*msi_setup)(struct pci_pbm_info *pbm, unsigned long msiqid,
+                        unsigned long msi, int is_msi64);
+       int (*msi_teardown)(struct pci_pbm_info *pbm, unsigned long msi);
+       int (*msiq_alloc)(struct pci_pbm_info *pbm);
+       void (*msiq_free)(struct pci_pbm_info *pbm);
+       int (*msiq_build_irq)(struct pci_pbm_info *pbm, unsigned long msiqid,
+                             unsigned long devino);
+};
+
+extern void sparc64_pbm_msi_init(struct pci_pbm_info *pbm,
+                                const struct sparc64_msiq_ops *ops);
+
+struct sparc64_msiq_cookie {
+       struct pci_pbm_info *pbm;
+       unsigned long msiqid;
+};
+#endif
+
 struct pci_controller_info;
 
 struct pci_pbm_info {
@@ -77,6 +104,9 @@ struct pci_pbm_info {
        /* Base of PCI Config space, can be per-PBM or shared. */
        unsigned long                   config_space;
 
+       /* This will be 12 on PCI-E controllers, 8 elsewhere.  */
+       unsigned long                   config_space_reg_bits;
+
        /* State of 66MHz capabilities on this PBM. */
        int                             is_66mhz_capable;
        int                             all_devs_66mhz;
@@ -87,6 +117,8 @@ struct pci_pbm_info {
        u32                             msiq_ent_count;
        u32                             msiq_first;
        u32                             msiq_first_devino;
+       u32                             msiq_rotor;
+       struct sparc64_msiq_cookie      *msiq_irq_cookies;
        u32                             msi_num;
        u32                             msi_first;
        u32                             msi_data_mask;
@@ -97,9 +129,11 @@ struct pci_pbm_info {
        u32                             msi64_len;
        void                            *msi_queues;
        unsigned long                   *msi_bitmap;
+       unsigned int                    *msi_irq_table;
        int (*setup_msi_irq)(unsigned int *virt_irq_p, struct pci_dev *pdev,
                             struct msi_desc *entry);
        void (*teardown_msi_irq)(unsigned int virt_irq, struct pci_dev *pdev);
+       const struct sparc64_msiq_ops   *msi_ops;
 #endif /* !(CONFIG_PCI_MSI) */
 
        /* This PBM's streaming buffer. */
@@ -123,7 +157,6 @@ struct pci_controller_info {
 };
 
 extern struct pci_pbm_info *pci_pbm_root;
-extern unsigned long pci_memspace_mask;
 
 extern int pci_num_pbms;
 
@@ -156,4 +189,7 @@ extern void pci_config_write8(u8 *addr, u8 val);
 extern void pci_config_write16(u16 *addr, u16 val);
 extern void pci_config_write32(u32 *addr, u32 val);
 
+extern struct pci_ops sun4u_pci_ops;
+extern struct pci_ops sun4v_pci_ops;
+
 #endif /* !(PCI_IMPL_H) */