Merge ../linus

[pandora-kernel.git] / arch / sparc / kernel / smp.c

diff --git a/arch/sparc/kernel/smp.c b/arch/sparc/kernel/smp.c
index 2be8121..276f228 100644 (file)
--- a/arch/sparc/kernel/smp.c
+++ b/arch/sparc/kernel/smp.c
@@ -34,7 +34,6 @@
 #include <asm/tlbflush.h>
 #include <asm/cpudata.h>
 
-volatile int smp_processors_ready = 0;
 int smp_num_cpus = 1;
 volatile unsigned long cpu_callin_map[NR_CPUS] __initdata = {0,};
 unsigned char boot_cpu_id = 0;
@@ -58,7 +57,7 @@ cpumask_t smp_commenced_mask = CPU_MASK_NONE;
 /* Used to make bitops atomic */
 unsigned char bitops_spinlock = 0;
 
-void __init smp_store_cpu_info(int id)
+void __cpuinit smp_store_cpu_info(int id)
 {
        int cpu_node;
 
@@ -69,6 +68,17 @@ void __init smp_store_cpu_info(int id)
                                                     "clock-frequency", 0);
        cpu_data(id).prom_node = cpu_node;
        cpu_data(id).mid = cpu_get_hwmid(cpu_node);
+
+       /* this is required to tune the scheduler correctly */
+       /* is it possible to have CPUs with different cache sizes? */
+       if (id == boot_cpu_id) {
+               int cache_line,cache_nlines;
+               cache_line = 0x20;
+               cache_line = prom_getintdefault(cpu_node, "ecache-line-size", cache_line);
+               cache_nlines = 0x8000;
+               cache_nlines = prom_getintdefault(cpu_node, "ecache-nlines", cache_nlines);
+               max_cache_size = cache_line * cache_nlines;
+       }
        if (cpu_data(id).mid < 0)
                panic("No MID found for CPU%d at node 0x%08d", id, cpu_node);
 }
@@ -76,6 +86,7 @@ void __init smp_store_cpu_info(int id)
 void __init smp_cpus_done(unsigned int max_cpus)
 {
        extern void smp4m_smp_done(void);
+       extern void smp4d_smp_done(void);
        unsigned long bogosum = 0;
        int cpu, num;
 
@@ -89,8 +100,34 @@ void __init smp_cpus_done(unsigned int max_cpus)
                num, bogosum/(500000/HZ),
                (bogosum/(5000/HZ))%100);
 
-       BUG_ON(sparc_cpu_model != sun4m);
-       smp4m_smp_done();
+       switch(sparc_cpu_model) {
+       case sun4:
+               printk("SUN4\n");
+               BUG();
+               break;
+       case sun4c:
+               printk("SUN4C\n");
+               BUG();
+               break;
+       case sun4m:
+               smp4m_smp_done();
+               break;
+       case sun4d:
+               smp4d_smp_done();
+               break;
+       case sun4e:
+               printk("SUN4E\n");
+               BUG();
+               break;
+       case sun4u:
+               printk("SUN4U\n");
+               BUG();
+               break;
+       default:
+               printk("UNKNOWN!\n");
+               BUG();
+               break;
+       };
 }
 
 void cpu_panic(void)
@@ -244,7 +281,7 @@ int setup_profiling_timer(unsigned int multiplier)
                return -EINVAL;
 
        spin_lock_irqsave(&prof_setup_lock, flags);
-       for_each_cpu(i) {
+       for_each_possible_cpu(i) {
                load_profile_irq(i, lvl14_resolution / multiplier);
                prof_multiplier(i) = multiplier;
        }
@@ -256,30 +293,71 @@ int setup_profiling_timer(unsigned int multiplier)
 void __init smp_prepare_cpus(unsigned int max_cpus)
 {
        extern void smp4m_boot_cpus(void);
-       int i, cpuid, ncpus, extra;
+       extern void smp4d_boot_cpus(void);
+       int i, cpuid, extra;
 
-       BUG_ON(sparc_cpu_model != sun4m);
        printk("Entering SMP Mode...\n");
 
-       ncpus = 1;
        extra = 0;
        for (i = 0; !cpu_find_by_instance(i, NULL, &cpuid); i++) {
-               if (cpuid == boot_cpu_id)
-                       continue;
-               if (cpuid < NR_CPUS && ncpus++ < max_cpus)
-                       cpu_set(cpuid, phys_cpu_present_map);
-               else
+               if (cpuid >= NR_CPUS)
                        extra++;
        }
-       if (max_cpus >= NR_CPUS && extra)
+       /* i = number of cpus */
+       if (extra && max_cpus > i - extra)
                printk("Warning: NR_CPUS is too low to start all cpus\n");
 
        smp_store_cpu_info(boot_cpu_id);
 
-       smp4m_boot_cpus();
+       switch(sparc_cpu_model) {
+       case sun4:
+               printk("SUN4\n");
+               BUG();
+               break;
+       case sun4c:
+               printk("SUN4C\n");
+               BUG();
+               break;
+       case sun4m:
+               smp4m_boot_cpus();
+               break;
+       case sun4d:
+               smp4d_boot_cpus();
+               break;
+       case sun4e:
+               printk("SUN4E\n");
+               BUG();
+               break;
+       case sun4u:
+               printk("SUN4U\n");
+               BUG();
+               break;
+       default:
+               printk("UNKNOWN!\n");
+               BUG();
+               break;
+       };
+}
+
+/* Set this up early so that things like the scheduler can init
+ * properly.  We use the same cpu mask for both the present and
+ * possible cpu map.
+ */
+void __init smp_setup_cpu_possible_map(void)
+{
+       int instance, mid;
+
+       instance = 0;
+       while (!cpu_find_by_instance(instance, NULL, &mid)) {
+               if (mid < NR_CPUS) {
+                       cpu_set(mid, phys_cpu_present_map);
+                       cpu_set(mid, cpu_present_map);
+               }
+               instance++;
+       }
 }
 
-void __devinit smp_prepare_boot_cpu(void)
+void __init smp_prepare_boot_cpu(void)
 {
        int cpuid = hard_smp_processor_id();
 
@@ -295,12 +373,40 @@ void __devinit smp_prepare_boot_cpu(void)
        cpu_set(cpuid, phys_cpu_present_map);
 }
 
-int __devinit __cpu_up(unsigned int cpu)
+int __cpuinit __cpu_up(unsigned int cpu)
 {
        extern int smp4m_boot_one_cpu(int);
-       int ret;
-
-       ret = smp4m_boot_one_cpu(cpu);
+       extern int smp4d_boot_one_cpu(int);
+       int ret=0;
+
+       switch(sparc_cpu_model) {
+       case sun4:
+               printk("SUN4\n");
+               BUG();
+               break;
+       case sun4c:
+               printk("SUN4C\n");
+               BUG();
+               break;
+       case sun4m:
+               ret = smp4m_boot_one_cpu(cpu);
+               break;
+       case sun4d:
+               ret = smp4d_boot_one_cpu(cpu);
+               break;
+       case sun4e:
+               printk("SUN4E\n");
+               BUG();
+               break;
+       case sun4u:
+               printk("SUN4U\n");
+               BUG();
+               break;
+       default:
+               printk("UNKNOWN!\n");
+               BUG();
+               break;
+       };
 
        if (!ret) {
                cpu_set(cpu, smp_commenced_mask);