Merge branch 'fix/hda' into for-linus

[pandora-kernel.git] / arch / sh / include / asm / spinlock.h

diff --git a/arch/sh/include/asm/spinlock.h b/arch/sh/include/asm/spinlock.h
index a28c9f0..bdc0f3b 100644 (file)
--- a/arch/sh/include/asm/spinlock.h
+++ b/arch/sh/include/asm/spinlock.h
@@ -23,10 +23,10 @@
  * Your basic SMP spinlocks, allowing only a single CPU anywhere
  */
 
-#define __raw_spin_is_locked(x)                ((x)->lock <= 0)
-#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
-#define __raw_spin_unlock_wait(x) \
-       do { while (__raw_spin_is_locked(x)) cpu_relax(); } while (0)
+#define arch_spin_is_locked(x)         ((x)->lock <= 0)
+#define arch_spin_lock_flags(lock, flags) arch_spin_lock(lock)
+#define arch_spin_unlock_wait(x) \
+       do { while (arch_spin_is_locked(x)) cpu_relax(); } while (0)
 
 /*
  * Simple spin lock operations.  There are two variants, one clears IRQ's
@@ -34,14 +34,14 @@
  *
  * We make no fairness assumptions.  They have a cost.
  */
-static inline void __raw_spin_lock(raw_spinlock_t *lock)
+static inline void arch_spin_lock(arch_spinlock_t *lock)
 {
        unsigned long tmp;
        unsigned long oldval;
 
        __asm__ __volatile__ (
                "1:                                             \n\t"
-               "movli.l        @%2, %0 ! __raw_spin_lock       \n\t"
+               "movli.l        @%2, %0 ! arch_spin_lock        \n\t"
                "mov            %0, %1                          \n\t"
                "mov            #0, %0                          \n\t"
                "movco.l        %0, @%2                         \n\t"
@@ -54,12 +54,12 @@ static inline void __raw_spin_lock(raw_spinlock_t *lock)
        );
 }
 
-static inline void __raw_spin_unlock(raw_spinlock_t *lock)
+static inline void arch_spin_unlock(arch_spinlock_t *lock)
 {
        unsigned long tmp;
 
        __asm__ __volatile__ (
-               "mov            #1, %0 ! __raw_spin_unlock      \n\t"
+               "mov            #1, %0 ! arch_spin_unlock       \n\t"
                "mov.l          %0, @%1                         \n\t"
                : "=&z" (tmp)
                : "r" (&lock->lock)
@@ -67,13 +67,13 @@ static inline void __raw_spin_unlock(raw_spinlock_t *lock)
        );
 }
 
-static inline int __raw_spin_trylock(raw_spinlock_t *lock)
+static inline int arch_spin_trylock(arch_spinlock_t *lock)
 {
        unsigned long tmp, oldval;
 
        __asm__ __volatile__ (
                "1:                                             \n\t"
-               "movli.l        @%2, %0 ! __raw_spin_trylock    \n\t"
+               "movli.l        @%2, %0 ! arch_spin_trylock     \n\t"
                "mov            %0, %1                          \n\t"
                "mov            #0, %0                          \n\t"
                "movco.l        %0, @%2                         \n\t"
@@ -100,21 +100,21 @@ static inline int __raw_spin_trylock(raw_spinlock_t *lock)
  * read_can_lock - would read_trylock() succeed?
  * @lock: the rwlock in question.
  */
-#define __raw_read_can_lock(x) ((x)->lock > 0)
+#define arch_read_can_lock(x)  ((x)->lock > 0)
 
 /**
  * write_can_lock - would write_trylock() succeed?
  * @lock: the rwlock in question.
  */
-#define __raw_write_can_lock(x)        ((x)->lock == RW_LOCK_BIAS)
+#define arch_write_can_lock(x) ((x)->lock == RW_LOCK_BIAS)
 
-static inline void __raw_read_lock(raw_rwlock_t *rw)
+static inline void arch_read_lock(arch_rwlock_t *rw)
 {
        unsigned long tmp;
 
        __asm__ __volatile__ (
                "1:                                             \n\t"
-               "movli.l        @%1, %0 ! __raw_read_lock       \n\t"
+               "movli.l        @%1, %0 ! arch_read_lock        \n\t"
                "cmp/pl         %0                              \n\t"
                "bf             1b                              \n\t"
                "add            #-1, %0                         \n\t"
@@ -126,13 +126,13 @@ static inline void __raw_read_lock(raw_rwlock_t *rw)
        );
 }
 
-static inline void __raw_read_unlock(raw_rwlock_t *rw)
+static inline void arch_read_unlock(arch_rwlock_t *rw)
 {
        unsigned long tmp;
 
        __asm__ __volatile__ (
                "1:                                             \n\t"
-               "movli.l        @%1, %0 ! __raw_read_unlock     \n\t"
+               "movli.l        @%1, %0 ! arch_read_unlock      \n\t"
                "add            #1, %0                          \n\t"
                "movco.l        %0, @%1                         \n\t"
                "bf             1b                              \n\t"
@@ -142,13 +142,13 @@ static inline void __raw_read_unlock(raw_rwlock_t *rw)
        );
 }
 
-static inline void __raw_write_lock(raw_rwlock_t *rw)
+static inline void arch_write_lock(arch_rwlock_t *rw)
 {
        unsigned long tmp;
 
        __asm__ __volatile__ (
                "1:                                             \n\t"
-               "movli.l        @%1, %0 ! __raw_write_lock      \n\t"
+               "movli.l        @%1, %0 ! arch_write_lock       \n\t"
                "cmp/hs         %2, %0                          \n\t"
                "bf             1b                              \n\t"
                "sub            %2, %0                          \n\t"
@@ -160,23 +160,23 @@ static inline void __raw_write_lock(raw_rwlock_t *rw)
        );
 }
 
-static inline void __raw_write_unlock(raw_rwlock_t *rw)
+static inline void arch_write_unlock(arch_rwlock_t *rw)
 {
        __asm__ __volatile__ (
-               "mov.l          %1, @%0 ! __raw_write_unlock    \n\t"
+               "mov.l          %1, @%0 ! arch_write_unlock     \n\t"
                :
                : "r" (&rw->lock), "r" (RW_LOCK_BIAS)
                : "t", "memory"
        );
 }
 
-static inline int __raw_read_trylock(raw_rwlock_t *rw)
+static inline int arch_read_trylock(arch_rwlock_t *rw)
 {
        unsigned long tmp, oldval;
 
        __asm__ __volatile__ (
                "1:                                             \n\t"
-               "movli.l        @%2, %0 ! __raw_read_trylock    \n\t"
+               "movli.l        @%2, %0 ! arch_read_trylock     \n\t"
                "mov            %0, %1                          \n\t"
                "cmp/pl         %0                              \n\t"
                "bf             2f                              \n\t"
@@ -193,13 +193,13 @@ static inline int __raw_read_trylock(raw_rwlock_t *rw)
        return (oldval > 0);
 }
 
-static inline int __raw_write_trylock(raw_rwlock_t *rw)
+static inline int arch_write_trylock(arch_rwlock_t *rw)
 {
        unsigned long tmp, oldval;
 
        __asm__ __volatile__ (
                "1:                                             \n\t"
-               "movli.l        @%2, %0 ! __raw_write_trylock   \n\t"
+               "movli.l        @%2, %0 ! arch_write_trylock    \n\t"
                "mov            %0, %1                          \n\t"
                "cmp/hs         %3, %0                          \n\t"
                "bf             2f                              \n\t"
@@ -216,11 +216,11 @@ static inline int __raw_write_trylock(raw_rwlock_t *rw)
        return (oldval > (RW_LOCK_BIAS - 1));
 }
 
-#define __raw_read_lock_flags(lock, flags) __raw_read_lock(lock)
-#define __raw_write_lock_flags(lock, flags) __raw_write_lock(lock)
+#define arch_read_lock_flags(lock, flags) arch_read_lock(lock)
+#define arch_write_lock_flags(lock, flags) arch_write_lock(lock)
 
-#define _raw_spin_relax(lock)  cpu_relax()
-#define _raw_read_relax(lock)  cpu_relax()
-#define _raw_write_relax(lock) cpu_relax()
+#define arch_spin_relax(lock)  cpu_relax()
+#define arch_read_relax(lock)  cpu_relax()
+#define arch_write_relax(lock) cpu_relax()
 
 #endif /* __ASM_SH_SPINLOCK_H */