* space mapping) will be called via the platform defined function
* pcibios_init_platform().
*/
-static int __init sh7780_pci_init(void)
+int __init sh7780_pci_init(struct pci_channel *chan)
{
unsigned int id;
int ret, match = 0;
pr_debug("PCI: Starting intialization.\n");
+ chan->reg_base = 0xfe040000;
+ chan->io_base = 0xfe200000;
+
ctrl_outl(0x00000001, SH7780_PCI_VCR2); /* Enable PCIC */
/* check for SH7780/SH7780R hardware */
- id = pci_read_reg(NULL, SH7780_PCIVID);
+ id = pci_read_reg(chan, SH7780_PCIVID);
if ((id & 0xffff) == SH7780_VENDOR_ID) {
switch ((id >> 16) & 0xffff) {
case SH7763_DEVICE_ID:
ctrl_outl(0x33333333, INTC_INTPRI);
}
- if ((ret = sh4_pci_check_direct(NULL)) != 0)
+ if ((ret = sh4_pci_check_direct(chan)) != 0)
return ret;
return pcibios_init_platform();
}
-core_initcall(sh7780_pci_init);
int __init sh7780_pcic_init(struct pci_channel *chan,
struct sh4_pci_address_map *map)
{
u32 word;
- /*
- * This code is unused for some boards as it is done in the
- * bootloader and doing it here means the MAC addresses loaded
- * by the bootloader get lost.
- */
- if (!(map->flags & SH4_PCIC_NO_RESET)) {
- /* toggle PCI reset pin */
- word = SH4_PCICR_PREFIX | SH4_PCICR_PRST;
- pci_write_reg(chan, word, SH4_PCICR);
- /* Wait for a long time... not 1 sec. but long enough */
- mdelay(100);
- word = SH4_PCICR_PREFIX;
- pci_write_reg(chan, word, SH4_PCICR);
- }
-
/* set the command/status bits to:
* Wait Cycle Control + Parity Enable + Bus Master +
* Mem space enable
pci_write_reg(chan, map->window1.base, SH4_PCILAR1);
pci_write_reg(chan, map->window1.base, SH7780_PCIMBAR1);
- /* Map IO space into PCI IO window
- * The IO window is 64K-PCIBIOS_MIN_IO in size
- * IO addresses will be translated to the
- * PCI IO window base address
+ /* Map IO space into PCI IO window:
+ * IO addresses will be translated to the PCI IO window base address
*/
- pr_debug("PCI: Mapping IO address 0x%x - 0x%x to base 0x%x\n",
- PCIBIOS_MIN_IO, (64 << 10),
- SH7780_PCI_IO_BASE + PCIBIOS_MIN_IO);
+ pr_debug("PCI: Mapping IO address 0x%x - 0x%x to base 0x%lx\n",
+ chan->io_resource->start, chan->io_resource->end,
+ chan->io_base + chan->io_resource->start);
/* NOTE: I'm ignoring the PCI error IRQs for now..
* TODO: add support for the internal error interrupts and
word = SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_FTO;
pci_write_reg(chan, word, SH4_PCICR);
- return 1;
+ return 0;
}