Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6

[pandora-kernel.git] / arch / sh / boards / mach-ecovec24 / setup.c

diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c
index ddc7e4e..f48c492 100644 (file)
--- a/arch/sh/boards/mach-ecovec24/setup.c
+++ b/arch/sh/boards/mach-ecovec24/setup.c
@@ -231,14 +231,41 @@ static struct platform_device usb1_common_device = {
 };
 
 /* LCDC */
+const static struct fb_videomode ecovec_lcd_modes[] = {
+       {
+               .name           = "Panel",
+               .xres           = 800,
+               .yres           = 480,
+               .left_margin    = 220,
+               .right_margin   = 110,
+               .hsync_len      = 70,
+               .upper_margin   = 20,
+               .lower_margin   = 5,
+               .vsync_len      = 5,
+               .sync           = 0, /* hsync and vsync are active low */
+       },
+};
+
+const static struct fb_videomode ecovec_dvi_modes[] = {
+       {
+               .name           = "DVI",
+               .xres           = 1280,
+               .yres           = 720,
+               .left_margin    = 220,
+               .right_margin   = 110,
+               .hsync_len      = 40,
+               .upper_margin   = 20,
+               .lower_margin   = 5,
+               .vsync_len      = 5,
+               .sync = 0, /* hsync and vsync are active low */
+       },
+};
+
 static struct sh_mobile_lcdc_info lcdc_info = {
        .ch[0] = {
                .interface_type = RGB18,
                .chan = LCDC_CHAN_MAINLCD,
                .bpp = 16,
-               .lcd_cfg = {
-                       .sync = 0, /* hsync and vsync are active low */
-               },
                .lcd_size_cfg = { /* 7.0 inch */
                        .width = 152,
                        .height = 91,
@@ -693,32 +720,6 @@ static struct platform_device camera_devices[] = {
 };
 
 /* FSI */
-/*
- * FSI-B use external clock which came from da7210.
- * So, we should change parent of fsi
- */
-#define FCLKBCR                0xa415000c
-static void fsimck_init(struct clk *clk)
-{
-       u32 status = __raw_readl(clk->enable_reg);
-
-       /* use external clock */
-       status &= ~0x000000ff;
-       status |= 0x00000080;
-
-       __raw_writel(status, clk->enable_reg);
-}
-
-static struct clk_ops fsimck_clk_ops = {
-       .init = fsimck_init,
-};
-
-static struct clk fsimckb_clk = {
-       .ops            = &fsimck_clk_ops,
-       .enable_reg     = (void __iomem *)FCLKBCR,
-       .rate           = 0, /* unknown */
-};
-
 static struct sh_fsi_platform_info fsi_info = {
        .portb_flags = SH_FSI_BRS_INV |
                       SH_FSI_OUT_SLAVE_MODE |
@@ -1075,33 +1076,18 @@ static int __init arch_setup(void)
        if (gpio_get_value(GPIO_PTE6)) {
                /* DVI */
                lcdc_info.clock_source                  = LCDC_CLK_EXTERNAL;
-               lcdc_info.ch[0].clock_divider           = 1,
-               lcdc_info.ch[0].lcd_cfg.name            = "DVI";
-               lcdc_info.ch[0].lcd_cfg.xres            = 1280;
-               lcdc_info.ch[0].lcd_cfg.yres            = 720;
-               lcdc_info.ch[0].lcd_cfg.left_margin     = 220;
-               lcdc_info.ch[0].lcd_cfg.right_margin    = 110;
-               lcdc_info.ch[0].lcd_cfg.hsync_len       = 40;
-               lcdc_info.ch[0].lcd_cfg.upper_margin    = 20;
-               lcdc_info.ch[0].lcd_cfg.lower_margin    = 5;
-               lcdc_info.ch[0].lcd_cfg.vsync_len       = 5;
+               lcdc_info.ch[0].clock_divider           = 1;
+               lcdc_info.ch[0].lcd_cfg                 = ecovec_dvi_modes;
+               lcdc_info.ch[0].num_cfg                 = ARRAY_SIZE(ecovec_dvi_modes);
 
                gpio_set_value(GPIO_PTA2, 1);
                gpio_set_value(GPIO_PTU1, 1);
        } else {
                /* Panel */
-
                lcdc_info.clock_source                  = LCDC_CLK_PERIPHERAL;
-               lcdc_info.ch[0].clock_divider           = 2,
-               lcdc_info.ch[0].lcd_cfg.name            = "Panel";
-               lcdc_info.ch[0].lcd_cfg.xres            = 800;
-               lcdc_info.ch[0].lcd_cfg.yres            = 480;
-               lcdc_info.ch[0].lcd_cfg.left_margin     = 220;
-               lcdc_info.ch[0].lcd_cfg.right_margin    = 110;
-               lcdc_info.ch[0].lcd_cfg.hsync_len       = 70;
-               lcdc_info.ch[0].lcd_cfg.upper_margin    = 20;
-               lcdc_info.ch[0].lcd_cfg.lower_margin    = 5;
-               lcdc_info.ch[0].lcd_cfg.vsync_len       = 5;
+               lcdc_info.ch[0].clock_divider           = 2;
+               lcdc_info.ch[0].lcd_cfg                 = ecovec_lcd_modes;
+               lcdc_info.ch[0].num_cfg                 = ARRAY_SIZE(ecovec_lcd_modes);
 
                gpio_set_value(GPIO_PTR1, 1);
 
@@ -1252,10 +1238,10 @@ static int __init arch_setup(void)
        /* change parent of FSI B */
        clk = clk_get(NULL, "fsib_clk");
        if (!IS_ERR(clk)) {
-               clk_register(&fsimckb_clk);
-               clk_set_parent(clk, &fsimckb_clk);
-               clk_set_rate(clk, 11000);
-               clk_set_rate(&fsimckb_clk, 11000);
+               /* 48kHz dummy clock was used to make sure 1/1 divide */
+               clk_set_rate(&sh7724_fsimckb_clk, 48000);
+               clk_set_parent(clk, &sh7724_fsimckb_clk);
+               clk_set_rate(clk, 48000);
                clk_put(clk);
        }