Merge branch 'upstream'

[pandora-kernel.git] / arch / ppc / platforms / 83xx / mpc834x_sys.c

diff --git a/arch/ppc/platforms/83xx/mpc834x_sys.c b/arch/ppc/platforms/83xx/mpc834x_sys.c
index 79b3f53..012e1e6 100644 (file)
--- a/arch/ppc/platforms/83xx/mpc834x_sys.c
+++ b/arch/ppc/platforms/83xx/mpc834x_sys.c
@@ -3,7 +3,7 @@
  *
  * MPC834x SYS board specific routines
  *
- * Maintainer: Kumar Gala <kumar.gala@freescale.com>
+ * Maintainer: Kumar Gala <galak@kernel.crashing.org>
  *
  * Copyright 2005 Freescale Semiconductor Inc.
  *
@@ -70,12 +70,19 @@ mpc83xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
             *       A      B      C      D
             */
        {
-               {PIRQA, PIRQB,  PIRQC,  PIRQD}, /* idsel 0x11 */
-               {PIRQC, PIRQD,  PIRQA,  PIRQB}, /* idsel 0x12 */
-               {PIRQD, PIRQA,  PIRQB,  PIRQC}  /* idsel 0x13 */
+               {PIRQA, PIRQB, PIRQC, PIRQD},   /* idsel 0x11 */
+               {PIRQC, PIRQD, PIRQA, PIRQB},   /* idsel 0x12 */
+               {PIRQD, PIRQA, PIRQB, PIRQC},   /* idsel 0x13 */
+               {0, 0, 0, 0},
+               {PIRQA, PIRQB, PIRQC, PIRQD},   /* idsel 0x15 */
+               {PIRQD, PIRQA, PIRQB, PIRQC},   /* idsel 0x16 */
+               {PIRQC, PIRQD, PIRQA, PIRQB},   /* idsel 0x17 */
+               {PIRQB, PIRQC, PIRQD, PIRQA},   /* idsel 0x18 */
+               {0, 0, 0, 0},                   /* idsel 0x19 */
+               {0, 0, 0, 0},                   /* idsel 0x20 */
        };
 
-       const long min_idsel = 0x11, max_idsel = 0x13, irqs_per_slot = 4;
+       const long min_idsel = 0x11, max_idsel = 0x20, irqs_per_slot = 4;
        return PCI_IRQ_TABLE_LOOKUP;
 }
 
@@ -97,6 +104,7 @@ mpc834x_sys_setup_arch(void)
        bd_t *binfo = (bd_t *) __res;
        unsigned int freq;
        struct gianfar_platform_data *pdata;
+       struct gianfar_mdio_data *mdata;
 
        /* get the core frequency */
        freq = binfo->bi_intfreq;
@@ -111,24 +119,28 @@ mpc834x_sys_setup_arch(void)
 #endif
        mpc83xx_early_serial_map();
 
+       /* setup the board related info for the MDIO bus */
+       mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC83xx_MDIO);
+
+       mdata->irq[0] = MPC83xx_IRQ_EXT1;
+       mdata->irq[1] = MPC83xx_IRQ_EXT2;
+       mdata->irq[2] = -1;
+       mdata->irq[31] = -1;
+
        /* setup the board related information for the enet controllers */
        pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC1);
        if (pdata) {
                pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
-               pdata->interruptPHY = MPC83xx_IRQ_EXT1;
-               pdata->phyid = 0;
-               /* fixup phy address */
-               pdata->phy_reg_addr += binfo->bi_immr_base;
+               pdata->bus_id = 0;
+               pdata->phy_id = 0;
                memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
        }
 
        pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC2);
        if (pdata) {
                pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
-               pdata->interruptPHY = MPC83xx_IRQ_EXT2;
-               pdata->phyid = 1;
-               /* fixup phy address */
-               pdata->phy_reg_addr += binfo->bi_immr_base;
+               pdata->bus_id = 0;
+               pdata->phy_id = 1;
                memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
        }