Pull button into test branch

[pandora-kernel.git] / arch / powerpc / platforms / cell / spufs / backing_ops.c

diff --git a/arch/powerpc/platforms/cell/spufs/backing_ops.c b/arch/powerpc/platforms/cell/spufs/backing_ops.c
index caf0984..1898f0d 100644 (file)
--- a/arch/powerpc/platforms/cell/spufs/backing_ops.c
+++ b/arch/powerpc/platforms/cell/spufs/backing_ops.c
@@ -21,7 +21,6 @@
  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
-#include <linux/config.h>
 #include <linux/module.h>
 #include <linux/errno.h>
 #include <linux/sched.h>
@@ -32,10 +31,12 @@
 #include <linux/smp_lock.h>
 #include <linux/stddef.h>
 #include <linux/unistd.h>
+#include <linux/poll.h>
 
 #include <asm/io.h>
 #include <asm/spu.h>
 #include <asm/spu_csa.h>
+#include <asm/spu_info.h>
 #include <asm/mmu_context.h>
 #include "spufs.h"
 
@@ -87,6 +88,41 @@ static u32 spu_backing_mbox_stat_read(struct spu_context *ctx)
        return ctx->csa.prob.mb_stat_R;
 }
 
+static unsigned int spu_backing_mbox_stat_poll(struct spu_context *ctx,
+                                         unsigned int events)
+{
+       int ret;
+       u32 stat;
+
+       ret = 0;
+       spin_lock_irq(&ctx->csa.register_lock);
+       stat = ctx->csa.prob.mb_stat_R;
+
+       /* if the requested event is there, return the poll
+          mask, otherwise enable the interrupt to get notified,
+          but first mark any pending interrupts as done so
+          we don't get woken up unnecessarily */
+
+       if (events & (POLLIN | POLLRDNORM)) {
+               if (stat & 0xff0000)
+                       ret |= POLLIN | POLLRDNORM;
+               else {
+                       ctx->csa.priv1.int_stat_class0_RW &= ~0x1;
+                       ctx->csa.priv1.int_mask_class2_RW |= 0x1;
+               }
+       }
+       if (events & (POLLOUT | POLLWRNORM)) {
+               if (stat & 0x00ff00)
+                       ret = POLLOUT | POLLWRNORM;
+               else {
+                       ctx->csa.priv1.int_stat_class0_RW &= ~0x10;
+                       ctx->csa.priv1.int_mask_class2_RW |= 0x10;
+               }
+       }
+       spin_unlock_irq(&ctx->csa.register_lock);
+       return ret;
+}
+
 static int spu_backing_ibox_read(struct spu_context *ctx, u32 * data)
 {
        int ret;
@@ -232,9 +268,92 @@ static char *spu_backing_get_ls(struct spu_context *ctx)
        return ctx->csa.lscsa->ls;
 }
 
+static u32 spu_backing_runcntl_read(struct spu_context *ctx)
+{
+       return ctx->csa.prob.spu_runcntl_RW;
+}
+
+static void spu_backing_runcntl_write(struct spu_context *ctx, u32 val)
+{
+       spin_lock(&ctx->csa.register_lock);
+       ctx->csa.prob.spu_runcntl_RW = val;
+       if (val & SPU_RUNCNTL_RUNNABLE) {
+               ctx->csa.prob.spu_status_R |= SPU_STATUS_RUNNING;
+       } else {
+               ctx->csa.prob.spu_status_R &= ~SPU_STATUS_RUNNING;
+       }
+       spin_unlock(&ctx->csa.register_lock);
+}
+
+static void spu_backing_master_start(struct spu_context *ctx)
+{
+       struct spu_state *csa = &ctx->csa;
+       u64 sr1;
+
+       spin_lock(&csa->register_lock);
+       sr1 = csa->priv1.mfc_sr1_RW | MFC_STATE1_MASTER_RUN_CONTROL_MASK;
+       csa->priv1.mfc_sr1_RW = sr1;
+       spin_unlock(&csa->register_lock);
+}
+
+static void spu_backing_master_stop(struct spu_context *ctx)
+{
+       struct spu_state *csa = &ctx->csa;
+       u64 sr1;
+
+       spin_lock(&csa->register_lock);
+       sr1 = csa->priv1.mfc_sr1_RW & ~MFC_STATE1_MASTER_RUN_CONTROL_MASK;
+       csa->priv1.mfc_sr1_RW = sr1;
+       spin_unlock(&csa->register_lock);
+}
+
+static int spu_backing_set_mfc_query(struct spu_context * ctx, u32 mask,
+                                       u32 mode)
+{
+       struct spu_problem_collapsed *prob = &ctx->csa.prob;
+       int ret;
+
+       spin_lock(&ctx->csa.register_lock);
+       ret = -EAGAIN;
+       if (prob->dma_querytype_RW)
+               goto out;
+       ret = 0;
+       /* FIXME: what are the side-effects of this? */
+       prob->dma_querymask_RW = mask;
+       prob->dma_querytype_RW = mode;
+out:
+       spin_unlock(&ctx->csa.register_lock);
+
+       return ret;
+}
+
+static u32 spu_backing_read_mfc_tagstatus(struct spu_context * ctx)
+{
+       return ctx->csa.prob.dma_tagstatus_R;
+}
+
+static u32 spu_backing_get_mfc_free_elements(struct spu_context *ctx)
+{
+       return ctx->csa.prob.dma_qstatus_R;
+}
+
+static int spu_backing_send_mfc_command(struct spu_context *ctx,
+                                       struct mfc_dma_command *cmd)
+{
+       int ret;
+
+       spin_lock(&ctx->csa.register_lock);
+       ret = -EAGAIN;
+       /* FIXME: set up priv2->puq */
+       spin_unlock(&ctx->csa.register_lock);
+
+       return ret;
+}
+
 struct spu_context_ops spu_backing_ops = {
        .mbox_read = spu_backing_mbox_read,
        .mbox_stat_read = spu_backing_mbox_stat_read,
+       .mbox_stat_poll = spu_backing_mbox_stat_poll,
        .ibox_read = spu_backing_ibox_read,
        .wbox_write = spu_backing_wbox_write,
        .signal1_read = spu_backing_signal1_read,
@@ -249,4 +368,12 @@ struct spu_context_ops spu_backing_ops = {
        .npc_write = spu_backing_npc_write,
        .status_read = spu_backing_status_read,
        .get_ls = spu_backing_get_ls,
+       .runcntl_read = spu_backing_runcntl_read,
+       .runcntl_write = spu_backing_runcntl_write,
+       .master_start = spu_backing_master_start,
+       .master_stop = spu_backing_master_stop,
+       .set_mfc_query = spu_backing_set_mfc_query,
+       .read_mfc_tagstatus = spu_backing_read_mfc_tagstatus,
+       .get_mfc_free_elements = spu_backing_get_mfc_free_elements,
+       .send_mfc_command = spu_backing_send_mfc_command,
 };