Pull button into test branch
[pandora-kernel.git] / arch / powerpc / platforms / cell / spufs / backing_ops.c
index a5c489a..1898f0d 100644 (file)
@@ -21,7 +21,6 @@
  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
-#include <linux/config.h>
 #include <linux/module.h>
 #include <linux/errno.h>
 #include <linux/sched.h>
@@ -37,6 +36,7 @@
 #include <asm/io.h>
 #include <asm/spu.h>
 #include <asm/spu_csa.h>
+#include <asm/spu_info.h>
 #include <asm/mmu_context.h>
 #include "spufs.h"
 
@@ -268,6 +268,11 @@ static char *spu_backing_get_ls(struct spu_context *ctx)
        return ctx->csa.lscsa->ls;
 }
 
+static u32 spu_backing_runcntl_read(struct spu_context *ctx)
+{
+       return ctx->csa.prob.spu_runcntl_RW;
+}
+
 static void spu_backing_runcntl_write(struct spu_context *ctx, u32 val)
 {
        spin_lock(&ctx->csa.register_lock);
@@ -280,9 +285,69 @@ static void spu_backing_runcntl_write(struct spu_context *ctx, u32 val)
        spin_unlock(&ctx->csa.register_lock);
 }
 
-static void spu_backing_runcntl_stop(struct spu_context *ctx)
+static void spu_backing_master_start(struct spu_context *ctx)
 {
-       spu_backing_runcntl_write(ctx, SPU_RUNCNTL_STOP);
+       struct spu_state *csa = &ctx->csa;
+       u64 sr1;
+
+       spin_lock(&csa->register_lock);
+       sr1 = csa->priv1.mfc_sr1_RW | MFC_STATE1_MASTER_RUN_CONTROL_MASK;
+       csa->priv1.mfc_sr1_RW = sr1;
+       spin_unlock(&csa->register_lock);
+}
+
+static void spu_backing_master_stop(struct spu_context *ctx)
+{
+       struct spu_state *csa = &ctx->csa;
+       u64 sr1;
+
+       spin_lock(&csa->register_lock);
+       sr1 = csa->priv1.mfc_sr1_RW & ~MFC_STATE1_MASTER_RUN_CONTROL_MASK;
+       csa->priv1.mfc_sr1_RW = sr1;
+       spin_unlock(&csa->register_lock);
+}
+
+static int spu_backing_set_mfc_query(struct spu_context * ctx, u32 mask,
+                                       u32 mode)
+{
+       struct spu_problem_collapsed *prob = &ctx->csa.prob;
+       int ret;
+
+       spin_lock(&ctx->csa.register_lock);
+       ret = -EAGAIN;
+       if (prob->dma_querytype_RW)
+               goto out;
+       ret = 0;
+       /* FIXME: what are the side-effects of this? */
+       prob->dma_querymask_RW = mask;
+       prob->dma_querytype_RW = mode;
+out:
+       spin_unlock(&ctx->csa.register_lock);
+
+       return ret;
+}
+
+static u32 spu_backing_read_mfc_tagstatus(struct spu_context * ctx)
+{
+       return ctx->csa.prob.dma_tagstatus_R;
+}
+
+static u32 spu_backing_get_mfc_free_elements(struct spu_context *ctx)
+{
+       return ctx->csa.prob.dma_qstatus_R;
+}
+
+static int spu_backing_send_mfc_command(struct spu_context *ctx,
+                                       struct mfc_dma_command *cmd)
+{
+       int ret;
+
+       spin_lock(&ctx->csa.register_lock);
+       ret = -EAGAIN;
+       /* FIXME: set up priv2->puq */
+       spin_unlock(&ctx->csa.register_lock);
+
+       return ret;
 }
 
 struct spu_context_ops spu_backing_ops = {
@@ -303,6 +368,12 @@ struct spu_context_ops spu_backing_ops = {
        .npc_write = spu_backing_npc_write,
        .status_read = spu_backing_status_read,
        .get_ls = spu_backing_get_ls,
+       .runcntl_read = spu_backing_runcntl_read,
        .runcntl_write = spu_backing_runcntl_write,
-       .runcntl_stop = spu_backing_runcntl_stop,
+       .master_start = spu_backing_master_start,
+       .master_stop = spu_backing_master_stop,
+       .set_mfc_query = spu_backing_set_mfc_query,
+       .read_mfc_tagstatus = spu_backing_read_mfc_tagstatus,
+       .get_mfc_free_elements = spu_backing_get_mfc_free_elements,
+       .send_mfc_command = spu_backing_send_mfc_command,
 };