*/
#undef DEBUG
-#include <linux/config.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <asm/ppc-pci.h>
#include <asm/irq.h>
#include <asm/spu.h>
+#include <asm/spu_priv1.h>
+#include <asm/udbg.h>
#include "interrupt.h"
#include "iommu.h"
+#include "cbe_regs.h"
#include "pervasive.h"
+#include "ras.h"
#ifdef DEBUG
#define DBG(fmt...) udbg_printf(fmt)
printk("*** %04x : %s\n", hex, s ? s : "");
}
+static void __init cell_pcibios_fixup(void)
+{
+ struct pci_dev *dev = NULL;
+
+ for_each_pci_dev(dev)
+ pci_read_irq_line(dev);
+}
+
+static void __init cell_init_irq(void)
+{
+ iic_init_IRQ();
+ spider_init_IRQ();
+}
+
static void __init cell_setup_arch(void)
{
- ppc_md.init_IRQ = iic_init_IRQ;
- ppc_md.get_irq = iic_get_irq;
+#ifdef CONFIG_SPU_BASE
+ spu_priv1_ops = &spu_priv1_mmio_ops;
+#endif
+
+ cbe_regs_init();
+
+#ifdef CONFIG_CBE_RAS
+ cbe_ras_init();
+#endif
#ifdef CONFIG_SMP
smp_init_cell();
/* Find and initialize PCI host bridges */
init_pci_config_tokens();
find_and_init_phbs();
- spider_init_IRQ();
- cell_pervasive_init();
+ cbe_pervasive_init();
#ifdef CONFIG_DUMMY_CONSOLE
conswitchp = &dummy_con;
#endif
{
DBG(" -> cell_init_early()\n");
- hpte_init_native();
-
cell_init_iommu();
- ppc64_interrupt_controller = IC_CELL_PIC;
-
DBG(" <- cell_init_early()\n");
}
{
unsigned long root = of_get_flat_dt_root();
- if (of_flat_dt_is_compatible(root, "IBM,CBEA") ||
- of_flat_dt_is_compatible(root, "IBM,CPBW-1.0"))
- return 1;
+ if (!of_flat_dt_is_compatible(root, "IBM,CBEA") &&
+ !of_flat_dt_is_compatible(root, "IBM,CPBW-1.0"))
+ return 0;
+
+ hpte_init_native();
- return 0;
+ return 1;
}
/*
.calibrate_decr = generic_calibrate_decr,
.check_legacy_ioport = cell_check_legacy_ioport,
.progress = cell_progress,
+ .init_IRQ = cell_init_irq,
+ .pcibios_fixup = cell_pcibios_fixup,
#ifdef CONFIG_KEXEC
.machine_kexec = default_machine_kexec,
.machine_kexec_prepare = default_machine_kexec_prepare,