Pull button into test branch

[pandora-kernel.git] / arch / powerpc / kernel / cputable.c

diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index bfd499e..b742013 100644 (file)
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -42,6 +42,7 @@ extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
 #endif /* CONFIG_PPC32 */
 #ifdef CONFIG_PPC64
 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
+extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
 extern void __restore_cpu_ppc970(void);
 #endif /* CONFIG_PPC64 */
 
@@ -222,9 +223,9 @@ static struct cpu_spec cpu_specs[] = {
                .icache_bsize           = 128,
                .dcache_bsize           = 128,
                .num_pmcs               = 8,
-               .cpu_setup              = __setup_cpu_ppc970,
+               .cpu_setup              = __setup_cpu_ppc970MP,
                .cpu_restore            = __restore_cpu_ppc970,
-               .oprofile_cpu_type      = "ppc64/970",
+               .oprofile_cpu_type      = "ppc64/970MP",
                .oprofile_type          = PPC_OPROFILE_POWER4,
                .platform               = "ppc970",
        },
@@ -276,10 +277,45 @@ static struct cpu_spec cpu_specs[] = {
                .oprofile_mmcra_sipr    = MMCRA_SIPR,
                .platform               = "power5+",
        },
+       {       /* POWER6 in P5+ mode; 2.04-compliant processor */
+               .pvr_mask               = 0xffffffff,
+               .pvr_value              = 0x0f000001,
+               .cpu_name               = "POWER5+",
+               .cpu_features           = CPU_FTRS_POWER5,
+               .cpu_user_features      = COMMON_USER_POWER5_PLUS,
+               .icache_bsize           = 128,
+               .dcache_bsize           = 128,
+               .num_pmcs               = 6,
+               .oprofile_cpu_type      = "ppc64/power6",
+               .oprofile_type          = PPC_OPROFILE_POWER4,
+               .oprofile_mmcra_sihv    = POWER6_MMCRA_SIHV,
+               .oprofile_mmcra_sipr    = POWER6_MMCRA_SIPR,
+               .oprofile_mmcra_clear   = POWER6_MMCRA_THRM |
+                       POWER6_MMCRA_OTHER,
+               .platform               = "power5+",
+       },
        {       /* Power6 */
                .pvr_mask               = 0xffff0000,
                .pvr_value              = 0x003e0000,
-               .cpu_name               = "POWER6",
+               .cpu_name               = "POWER6 (raw)",
+               .cpu_features           = CPU_FTRS_POWER6,
+               .cpu_user_features      = COMMON_USER_POWER6 |
+                       PPC_FEATURE_POWER6_EXT,
+               .icache_bsize           = 128,
+               .dcache_bsize           = 128,
+               .num_pmcs               = 6,
+               .oprofile_cpu_type      = "ppc64/power6",
+               .oprofile_type          = PPC_OPROFILE_POWER4,
+               .oprofile_mmcra_sihv    = POWER6_MMCRA_SIHV,
+               .oprofile_mmcra_sipr    = POWER6_MMCRA_SIPR,
+               .oprofile_mmcra_clear   = POWER6_MMCRA_THRM |
+                       POWER6_MMCRA_OTHER,
+               .platform               = "power6x",
+       },
+       {       /* 2.05-compliant processor, i.e. Power6 "architected" mode */
+               .pvr_mask               = 0xffffffff,
+               .pvr_value              = 0x0f000002,
+               .cpu_name               = "POWER6 (architected)",
                .cpu_features           = CPU_FTRS_POWER6,
                .cpu_user_features      = COMMON_USER_POWER6,
                .icache_bsize           = 128,
@@ -303,6 +339,9 @@ static struct cpu_spec cpu_specs[] = {
                        PPC_FEATURE_SMT,
                .icache_bsize           = 128,
                .dcache_bsize           = 128,
+               .num_pmcs               = 4,
+               .oprofile_cpu_type      = "ppc64/cell-be",
+               .oprofile_type          = PPC_OPROFILE_CELL,
                .platform               = "ppc-cell-be",
        },
        {       /* PA Semi PA6T */
@@ -794,13 +833,24 @@ static struct cpu_spec cpu_specs[] = {
                .pvr_mask               = 0x7fff0000,
                .pvr_value              = 0x00840000,
                .cpu_name               = "e300c2",
-               .cpu_features           = CPU_FTRS_E300,
+               .cpu_features           = CPU_FTRS_E300C2,
                .cpu_user_features      = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
                .icache_bsize           = 32,
                .dcache_bsize           = 32,
                .cpu_setup              = __setup_cpu_603,
                .platform               = "ppc603",
        },
+       {       /* e300c3 on 83xx  */
+               .pvr_mask               = 0x7fff0000,
+               .pvr_value              = 0x00850000,
+               .cpu_name               = "e300c3",
+               .cpu_features           = CPU_FTRS_E300,
+               .cpu_user_features      = COMMON_USER,
+               .icache_bsize           = 32,
+               .dcache_bsize           = 32,
+               .cpu_setup              = __setup_cpu_603,
+               .platform               = "ppc603",
+       },
        {       /* default match, we assume split I/D cache & TB (non-601)... */
                .pvr_mask               = 0x00000000,
                .pvr_value              = 0x00000000,
@@ -1086,8 +1136,7 @@ static struct cpu_spec cpu_specs[] = {
                .pvr_mask               = 0xff000fff,
                .pvr_value              = 0x53000890,
                .cpu_name               = "440SPe Rev. A",
-               .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
-                       CPU_FTR_USE_TB,
+               .cpu_features           = CPU_FTRS_44X,
                .cpu_user_features      = COMMON_USER_BOOKE,
                .icache_bsize           = 32,
                .dcache_bsize           = 32,
@@ -1169,19 +1218,15 @@ static struct cpu_spec cpu_specs[] = {
 #endif /* CONFIG_PPC32 */
 };
 
-struct cpu_spec *identify_cpu(unsigned long offset)
+struct cpu_spec *identify_cpu(unsigned long offset, unsigned int pvr)
 {
        struct cpu_spec *s = cpu_specs;
        struct cpu_spec **cur = &cur_cpu_spec;
-       unsigned int pvr = mfspr(SPRN_PVR);
        int i;
 
        s = PTRRELOC(s);
        cur = PTRRELOC(cur);
 
-       if (*cur != NULL)
-               return PTRRELOC(*cur);
-
        for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++)
                if ((pvr & s->pvr_mask) == s->pvr_value) {
                        *cur = cpu_specs + i;