#address-cells = <1>;
#size-cells = <1>;
+ aliases {
+ serial0 = &serial0;
+ serial1 = &serial1;
+ pci0 = &pci0;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
#address-cells = <1>;
#size-cells = <1>;
- #interrupt-cells = <2>;
device_type = "soc";
compatible = "mpc10x";
store-gathering = <0>; /* 0 == off, !0 == on */
i2c@80003000 {
#address-cells = <1>;
#size-cells = <0>;
- device_type = "i2c";
+ cell-index = <0>;
compatible = "fsl-i2c";
reg = <80003000 1000>;
interrupts = <5 2>;
};
};
- serial@80004500 {
+ serial0: serial@80004500 {
+ cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
reg = <80004500 8>;
interrupt-parent = <&mpic>;
};
- serial@80004600 {
+ serial1: serial@80004600 {
+ cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
reg = <80004600 8>;
compatible = "chrp,open-pic";
interrupt-controller;
reg = <80040000 40000>;
- built-in;
};
- pci@fec00000 {
+ pci0: pci@fec00000 {
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;